JPS58184874A - 帯域圧縮装置 - Google Patents

帯域圧縮装置

Info

Publication number
JPS58184874A
JPS58184874A JP57068362A JP6836282A JPS58184874A JP S58184874 A JPS58184874 A JP S58184874A JP 57068362 A JP57068362 A JP 57068362A JP 6836282 A JP6836282 A JP 6836282A JP S58184874 A JPS58184874 A JP S58184874A
Authority
JP
Japan
Prior art keywords
compression
original image
circuit
image
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57068362A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0134424B2 (cg-RX-API-DMAC7.html
Inventor
Tetsuyuki Matsuka
松家　哲之
Yoshihiro Uno
宇野　喜博
Hiroaki Miwa
三輪　博昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Panasonic Holdings Corp
Original Assignee
Matsushita Graphic Communication Systems Inc
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP57068362A priority Critical patent/JPS58184874A/ja
Publication of JPS58184874A publication Critical patent/JPS58184874A/ja
Publication of JPH0134424B2 publication Critical patent/JPH0134424B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/41—Bandwidth or redundancy reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
JP57068362A 1982-04-22 1982-04-22 帯域圧縮装置 Granted JPS58184874A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57068362A JPS58184874A (ja) 1982-04-22 1982-04-22 帯域圧縮装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57068362A JPS58184874A (ja) 1982-04-22 1982-04-22 帯域圧縮装置

Publications (2)

Publication Number Publication Date
JPS58184874A true JPS58184874A (ja) 1983-10-28
JPH0134424B2 JPH0134424B2 (cg-RX-API-DMAC7.html) 1989-07-19

Family

ID=13371601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57068362A Granted JPS58184874A (ja) 1982-04-22 1982-04-22 帯域圧縮装置

Country Status (1)

Country Link
JP (1) JPS58184874A (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9184175B2 (en) 2013-03-15 2015-11-10 Micron Technology, Inc. Floating gate memory cells in vertical memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157173A (en) * 1980-05-07 1981-12-04 Sanyo Electric Co Ltd Picture signal compression circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157173A (en) * 1980-05-07 1981-12-04 Sanyo Electric Co Ltd Picture signal compression circuit

Also Published As

Publication number Publication date
JPH0134424B2 (cg-RX-API-DMAC7.html) 1989-07-19

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