JPS58159355A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58159355A
JPS58159355A JP4217982A JP4217982A JPS58159355A JP S58159355 A JPS58159355 A JP S58159355A JP 4217982 A JP4217982 A JP 4217982A JP 4217982 A JP4217982 A JP 4217982A JP S58159355 A JPS58159355 A JP S58159355A
Authority
JP
Japan
Prior art keywords
semiconductor device
substrate
adhered
semiconductor element
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4217982A
Other languages
English (en)
Japanese (ja)
Other versions
JPH041501B2 (en, 2012
Inventor
Eiji Hagimoto
萩本　英二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4217982A priority Critical patent/JPS58159355A/ja
Publication of JPS58159355A publication Critical patent/JPS58159355A/ja
Publication of JPH041501B2 publication Critical patent/JPH041501B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP4217982A 1982-03-17 1982-03-17 半導体装置の製造方法 Granted JPS58159355A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4217982A JPS58159355A (ja) 1982-03-17 1982-03-17 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4217982A JPS58159355A (ja) 1982-03-17 1982-03-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58159355A true JPS58159355A (ja) 1983-09-21
JPH041501B2 JPH041501B2 (en, 2012) 1992-01-13

Family

ID=12628757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4217982A Granted JPS58159355A (ja) 1982-03-17 1982-03-17 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58159355A (en, 2012)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6038842A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd ピングリッドアレイ型半導体パッケージ
JPS6059756A (ja) * 1983-09-12 1985-04-06 Ibiden Co Ltd プラグインパッケ−ジとその製造方法
JPS6095944A (ja) * 1983-10-31 1985-05-29 Ibiden Co Ltd プラグインパツケ−ジとその製造方法
JPS6095943A (ja) * 1983-10-31 1985-05-29 Ibiden Co Ltd プラグインパツケ−ジとその製造方法
JPS60101998A (ja) * 1983-11-07 1985-06-06 イビデン株式会社 プラグインパツケ−ジとその製造方法
JPS60241244A (ja) * 1984-05-16 1985-11-30 Hitachi Micro Comput Eng Ltd ピングリッドアレイ型半導体装置の製造方法
JPS6194359U (en, 2012) * 1984-11-27 1986-06-18
JPS61154152A (ja) * 1984-12-21 1986-07-12 フィリップス　エレクトロニクス　ネムローゼ　フェンノートシャップ 電子装置用ハウジング
US4661192A (en) * 1985-08-22 1987-04-28 Motorola, Inc. Low cost integrated circuit bonding process
JPS62194655A (ja) * 1985-11-20 1987-08-27 アンプ―アクゾ　コーポレイション 電子装置用接続パツケ−ジ及びその製造方法
JPS62248244A (ja) * 1986-04-21 1987-10-29 Hitachi Cable Ltd Ｐｇａ用リ−ドフレ−ム
US4850105A (en) * 1987-07-04 1989-07-25 Horiba, Ltd. Method of taking out lead of semiconductor tip part
US5255430A (en) * 1992-10-08 1993-10-26 Atmel Corporation Method of assembling a module for a smart card
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689277U (en, 2012) * 1979-12-11 1981-07-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5689277U (en, 2012) * 1979-12-11 1981-07-16

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6038842A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd ピングリッドアレイ型半導体パッケージ
JPS6059756A (ja) * 1983-09-12 1985-04-06 Ibiden Co Ltd プラグインパッケ−ジとその製造方法
JPS6095944A (ja) * 1983-10-31 1985-05-29 Ibiden Co Ltd プラグインパツケ−ジとその製造方法
JPS6095943A (ja) * 1983-10-31 1985-05-29 Ibiden Co Ltd プラグインパツケ−ジとその製造方法
JPS60101998A (ja) * 1983-11-07 1985-06-06 イビデン株式会社 プラグインパツケ−ジとその製造方法
JPS60241244A (ja) * 1984-05-16 1985-11-30 Hitachi Micro Comput Eng Ltd ピングリッドアレイ型半導体装置の製造方法
JPS6194359U (en, 2012) * 1984-11-27 1986-06-18
JPS61154152A (ja) * 1984-12-21 1986-07-12 フィリップス　エレクトロニクス　ネムローゼ　フェンノートシャップ 電子装置用ハウジング
US4661192A (en) * 1985-08-22 1987-04-28 Motorola, Inc. Low cost integrated circuit bonding process
JPS62194655A (ja) * 1985-11-20 1987-08-27 アンプ―アクゾ　コーポレイション 電子装置用接続パツケ−ジ及びその製造方法
JPS62248244A (ja) * 1986-04-21 1987-10-29 Hitachi Cable Ltd Ｐｇａ用リ−ドフレ−ム
US4850105A (en) * 1987-07-04 1989-07-25 Horiba, Ltd. Method of taking out lead of semiconductor tip part
US5255430A (en) * 1992-10-08 1993-10-26 Atmel Corporation Method of assembling a module for a smart card
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips

Also Published As

Publication number Publication date
JPH041501B2 (en, 2012) 1992-01-13

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