JPS6217382B2 - - Google Patents

Info

Publication number
JPS6217382B2
JPS6217382B2 JP54013358A JP1335879A JPS6217382B2 JP S6217382 B2 JPS6217382 B2 JP S6217382B2 JP 54013358 A JP54013358 A JP 54013358A JP 1335879 A JP1335879 A JP 1335879A JP S6217382 B2 JPS6217382 B2 JP S6217382B2
Authority
JP
Japan
Prior art keywords
tab
lead
leads
heat
tips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54013358A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55107251A (en
Inventor
Susumu Okikawa
Fumihito Inoe
Takehiko Yanagida
Kazuo Shimizu
Keizo Ootsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1335879A priority Critical patent/JPS55107251A/ja
Publication of JPS55107251A publication Critical patent/JPS55107251A/ja
Publication of JPS6217382B2 publication Critical patent/JPS6217382B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP1335879A 1979-02-09 1979-02-09 Electronic part and its packaging construction Granted JPS55107251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1335879A JPS55107251A (en) 1979-02-09 1979-02-09 Electronic part and its packaging construction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1335879A JPS55107251A (en) 1979-02-09 1979-02-09 Electronic part and its packaging construction

Publications (2)

Publication Number Publication Date
JPS55107251A JPS55107251A (en) 1980-08-16
JPS6217382B2 true JPS6217382B2 (en, 2012) 1987-04-17

Family

ID=11830868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1335879A Granted JPS55107251A (en) 1979-02-09 1979-02-09 Electronic part and its packaging construction

Country Status (1)

Country Link
JP (1) JPS55107251A (en, 2012)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0714021B2 (ja) * 1983-12-27 1995-02-15 株式会社東芝 樹脂封止型半導体装置
JPH0773122B2 (ja) * 1983-12-27 1995-08-02 株式会社東芝 封止型半導体装置
US4862246A (en) * 1984-09-26 1989-08-29 Hitachi, Ltd. Semiconductor device lead frame with etched through holes
JPH02260450A (ja) * 1989-03-30 1990-10-23 Mitsubishi Electric Corp 半導体装置およびその実装方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4421066Y1 (en, 2012) * 1966-07-20 1969-09-08
DE2328798A1 (de) * 1972-06-23 1974-01-17 Philips Nv Halbleiteranordnung
JPS5812736B2 (ja) * 1974-10-17 1983-03-10 日本電気株式会社 ジユシフウシガタハンドウタイソウチ

Also Published As

Publication number Publication date
JPS55107251A (en) 1980-08-16

Similar Documents

Publication Publication Date Title
US5521429A (en) Surface-mount flat package semiconductor device
US5198964A (en) Packaged semiconductor device and electronic device module including same
US6566164B1 (en) Exposed copper strap in a semiconductor package
JP2819285B2 (ja) 積層型ボトムリード半導体パッケージ
JPH03108744A (ja) 樹脂封止型半導体装置
US7102211B2 (en) Semiconductor device and hybrid integrated circuit device
KR100208634B1 (ko) 표면 실장형 반도체 장치
JPS6217382B2 (en, 2012)
JPS5998545A (ja) 半導体装置
JPS6329413B2 (en, 2012)
JPH07147359A (ja) 表面実装型半導体装置
JP2524482B2 (ja) Ｑｆｐ構造半導体装置
JPH03238852A (ja) モールド型半導体集積回路
JPH0817974A (ja) 放熱構造を持つｂｇａ型ｌｓｉパッケージ
KR100388291B1 (ko) 반도체패키지 구조
KR100342811B1 (ko) 복수개의칩이내장된에어리어어레이범프드반도체패키지
JPH0685165A (ja) 半導体装置及び半導体装置の製造方法
JPS63296258A (ja) 電子部品の実装構造
JP2912813B2 (ja) 電子部品
KR100369501B1 (ko) 반도체패키지
JPH0442942Y2 (en, 2012)
JPS635253Y2 (en, 2012)
JPH0320067B2 (en, 2012)
JPH01270256A (ja) 半導体装置
JPH06104353A (ja) 放熱板付樹脂封止半導体装置