JPS5778177A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS5778177A JPS5778177A JP55153247A JP15324780A JPS5778177A JP S5778177 A JPS5778177 A JP S5778177A JP 55153247 A JP55153247 A JP 55153247A JP 15324780 A JP15324780 A JP 15324780A JP S5778177 A JPS5778177 A JP S5778177A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- substrate
- film
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000000758 substrate Substances 0.000 abstract 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 150000002500 ions Chemical class 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To eliminate the erroneous operation of a semiconductor integrated circuit device by forming a reverse conductive type buried layer to a semiconductor substrate while continuing a source region underneath the drain and channel regions of an MOS transistor formed on the substrate, thereby preventing the diffusion of carrier generated secondarily by impact ionization at the drain side. CONSTITUTION:An n<+> type buried layer 22 is diffused in p type Si substrate 21, a p type layer 23 is epitaxially grown on the overall surface including the layer 22, a thick field oxidized film 24 reaching the substrate 21 is formed at the periphery, and a layer 23 is insularly formed on the layer 22. Subsequently, a thin gate oxidized film 25 is covered on the insular layer 23, a gate electrode 26 is formed using polycrystalline Si at the center, an SiO2 film 27 is covered, and with the film 27 as a mask an n<+> type source region 28 and a drain region 29 are formed in the layer 23 at both sides of the electrode 26 by ion injection. Thereafter, with a photoresist film as a mask n type impurity ions are injected only in the region 28 to convert the region 28 to a deep source region 28' reaching the layer 22.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55153247A JPS5778177A (en) | 1980-10-31 | 1980-10-31 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55153247A JPS5778177A (en) | 1980-10-31 | 1980-10-31 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5778177A true JPS5778177A (en) | 1982-05-15 |
Family
ID=15558272
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55153247A Pending JPS5778177A (en) | 1980-10-31 | 1980-10-31 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5778177A (en) |
-
1980
- 1980-10-31 JP JP55153247A patent/JPS5778177A/en active Pending
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