JPS5742151A - Formation of pattern - Google Patents

Formation of pattern

Info

Publication number
JPS5742151A
JPS5742151A JP11858980A JP11858980A JPS5742151A JP S5742151 A JPS5742151 A JP S5742151A JP 11858980 A JP11858980 A JP 11858980A JP 11858980 A JP11858980 A JP 11858980A JP S5742151 A JPS5742151 A JP S5742151A
Authority
JP
Japan
Prior art keywords
pattern
film
sio2
polycrystalline
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11858980A
Other languages
Japanese (ja)
Inventor
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11858980A priority Critical patent/JPS5742151A/en
Publication of JPS5742151A publication Critical patent/JPS5742151A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects

Abstract

PURPOSE:To obtain the fine and highly accurate pattern by attaching a pattern forming material on a substrate having a eaves shape or a nearly vertical step, and performing etching from the vertical direction. CONSTITUTION:An Si3N4 2 is provided on a P type Si substrate 1 and SiO2 3 is layered. A mask whose etching speed is slower than that of the film 3 is layered on the film 3, and the film 3 is selectively etched. Furthermore the side of the film 3 is etched. Then the end face of the film 3 becomes nearly vertical. After the coating with polycrystalline Si 4, reactive sputter etching is performed with CF4+O2 gas, and polycrystalline Si 5 is left on the end face of the SiO2 3. Then, the SiO2 3 is selectively etched by HF solution, and fine polycrystallike Si pattern 5 is obtained. The width of the pattern is approximately equal to the thickness of polycrystalline Si 4. The pattern is ormed with the accuracy (about 0.01mum) within the thickness control range in a CVD method. The Si3N4 2 is etched by the remaining mask 5, and N<+> layers 6 and 7 are formed. Then an FET with a fine gate width is completed without using a resist.
JP11858980A 1980-08-28 1980-08-28 Formation of pattern Pending JPS5742151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11858980A JPS5742151A (en) 1980-08-28 1980-08-28 Formation of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11858980A JPS5742151A (en) 1980-08-28 1980-08-28 Formation of pattern

Publications (1)

Publication Number Publication Date
JPS5742151A true JPS5742151A (en) 1982-03-09

Family

ID=14740319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11858980A Pending JPS5742151A (en) 1980-08-28 1980-08-28 Formation of pattern

Country Status (1)

Country Link
JP (1) JPS5742151A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61223181A (en) * 1985-03-29 1986-10-03 Mitsubishi Metal Corp Cutting tool made of surface-coated tungsten carbide sintered hard alloy
JPS61223180A (en) * 1985-03-29 1986-10-03 Mitsubishi Metal Corp Cutting tool made of surface-coated tungsten carbide sintered hard alloy
JPH01119028A (en) * 1987-10-30 1989-05-11 Nec Corp Manufacture of semiconductor device
US4992387A (en) * 1989-03-27 1991-02-12 Matsushita Electric Industrial Co., Ltd. Method for fabrication of self-aligned asymmetric field effect transistors
US5112766A (en) * 1990-07-17 1992-05-12 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing field effect transistors
US5202272A (en) * 1991-03-25 1993-04-13 International Business Machines Corporation Field effect transistor formed with deep-submicron gate
US5391510A (en) * 1992-02-28 1995-02-21 International Business Machines Corporation Formation of self-aligned metal gate FETs using a benignant removable gate material during high temperature steps

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61223181A (en) * 1985-03-29 1986-10-03 Mitsubishi Metal Corp Cutting tool made of surface-coated tungsten carbide sintered hard alloy
JPS61223180A (en) * 1985-03-29 1986-10-03 Mitsubishi Metal Corp Cutting tool made of surface-coated tungsten carbide sintered hard alloy
JPH01119028A (en) * 1987-10-30 1989-05-11 Nec Corp Manufacture of semiconductor device
US4992387A (en) * 1989-03-27 1991-02-12 Matsushita Electric Industrial Co., Ltd. Method for fabrication of self-aligned asymmetric field effect transistors
US5112766A (en) * 1990-07-17 1992-05-12 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing field effect transistors
US5202272A (en) * 1991-03-25 1993-04-13 International Business Machines Corporation Field effect transistor formed with deep-submicron gate
US5391510A (en) * 1992-02-28 1995-02-21 International Business Machines Corporation Formation of self-aligned metal gate FETs using a benignant removable gate material during high temperature steps

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