JPS5742148A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5742148A
JPS5742148A JP11745880A JP11745880A JPS5742148A JP S5742148 A JPS5742148 A JP S5742148A JP 11745880 A JP11745880 A JP 11745880A JP 11745880 A JP11745880 A JP 11745880A JP S5742148 A JPS5742148 A JP S5742148A
Authority
JP
Japan
Prior art keywords
si3n4
resisting property
film
gate
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11745880A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP11745880A priority Critical patent/JPS5742148A/en
Publication of JPS5742148A publication Critical patent/JPS5742148A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To obtain the semiconductor device characterized by excellent water resisting property, contamination resisting property, and radiation resisting property, by adopting a double layered Si3N4 structure. CONSTITUTION:An Si3N4 film 13 is layered on a field oxide film 11 of an Si gate MOSFET and a gate oxide film 12 by a CVD method. Then a polycrystalline Si gate 14 and a source and a drain 15 and 16 are formed, and the surface is covered by PSG17. A window is provided, Al wiring 18 is provided, and an Si3N4 film 19 is formed by a plasma CVD method. In this constitution, the underlying Si3N4 film 13 can prevent radiation damage caused by the plasma reaction, and the highly reliable device can be obtained.
JP11745880A 1980-08-26 1980-08-26 Semiconductor device Pending JPS5742148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11745880A JPS5742148A (en) 1980-08-26 1980-08-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11745880A JPS5742148A (en) 1980-08-26 1980-08-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5742148A true JPS5742148A (en) 1982-03-09

Family

ID=14712162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11745880A Pending JPS5742148A (en) 1980-08-26 1980-08-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5742148A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100339A (en) * 1988-10-06 1990-04-12 Nec Corp Semiconductor device
US5618755A (en) * 1994-05-17 1997-04-08 Fuji Electric Co., Ltd. Method of manufacturing a polycide electrode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100339A (en) * 1988-10-06 1990-04-12 Nec Corp Semiconductor device
US5618755A (en) * 1994-05-17 1997-04-08 Fuji Electric Co., Ltd. Method of manufacturing a polycide electrode

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