JPS57194563A - Basic gate circuit for integrated circuit - Google Patents

Basic gate circuit for integrated circuit

Info

Publication number
JPS57194563A
JPS57194563A JP56079018A JP7901881A JPS57194563A JP S57194563 A JPS57194563 A JP S57194563A JP 56079018 A JP56079018 A JP 56079018A JP 7901881 A JP7901881 A JP 7901881A JP S57194563 A JPS57194563 A JP S57194563A
Authority
JP
Japan
Prior art keywords
input
channel
clock signals
fet
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56079018A
Other languages
Japanese (ja)
Inventor
Ryota Kasai
Tsunetaka Sudo
Katsuji Horiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56079018A priority Critical patent/JPS57194563A/en
Publication of JPS57194563A publication Critical patent/JPS57194563A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • H03K19/0963Synchronous circuits, i.e. using clock signals using transistors of complementary type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain the basic gate circuit with less power consumption and less restrictions on design by a method wherein the switching FET is connected between one FET connected to the power supply side and the other FET connected to the ground side in the mutually supplementing relation to be operated by means of the clock signals. CONSTITUTION:The clock signals are input into one gate electrode connecting to the power supply say the P channel MOSFET32 and the other gate electrode of the enhancement type N channel MOSFET34 inserted between the source and ground of the N channel NOSFET33a-33n for the dynamic operation. When the low clock signals are input into the clock input terminal 35, the FET32 is turned on and the FET34 is turned off. Consequently, the interval between the data output terminals 31a-31n is subject to the high impedance and the signal line connected to input and output terminals is charged up. Through these procedures, the power consumption may be reduced relieving the restrictions on the layout.
JP56079018A 1981-05-25 1981-05-25 Basic gate circuit for integrated circuit Pending JPS57194563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56079018A JPS57194563A (en) 1981-05-25 1981-05-25 Basic gate circuit for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56079018A JPS57194563A (en) 1981-05-25 1981-05-25 Basic gate circuit for integrated circuit

Publications (1)

Publication Number Publication Date
JPS57194563A true JPS57194563A (en) 1982-11-30

Family

ID=13678196

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56079018A Pending JPS57194563A (en) 1981-05-25 1981-05-25 Basic gate circuit for integrated circuit

Country Status (1)

Country Link
JP (1) JPS57194563A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5117370A (en) * 1974-07-31 1976-02-12 Incotex Sa Kairyosaretashasochi

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5117370A (en) * 1974-07-31 1976-02-12 Incotex Sa Kairyosaretashasochi

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