JPS6432719A - Output device for semiconductor integrated circuit - Google Patents
Output device for semiconductor integrated circuitInfo
- Publication number
- JPS6432719A JPS6432719A JP62189627A JP18962787A JPS6432719A JP S6432719 A JPS6432719 A JP S6432719A JP 62189627 A JP62189627 A JP 62189627A JP 18962787 A JP18962787 A JP 18962787A JP S6432719 A JPS6432719 A JP S6432719A
- Authority
- JP
- Japan
- Prior art keywords
- condition
- integrated circuit
- output device
- semiconductor integrated
- making
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To reduce a through current by making a P-MOST (an N-MOST) composing a final stage into an OFF condition, and thereafter, making the N-MOST (the P-MOST) into an ON condition. CONSTITUTION:When the signal of an H level is impressed to a signal input terminal IN, an output terminal A of a gate circuit 4 having a NOR function proceeds to an L level. However, since, the output terminal of the gate circuit 4 is connected with the gate capacity of an N-MOST 2, the output waveform goes to dull. As a result, for the movement of the MOS transistor of the final stage, the P-MOST is made into the ON condition after the N-most is made into the OFF condition. Thus, since the P-MOST and the N-MOST can not be simultaneously turned on, the through current does not flow.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62189627A JPS6432719A (en) | 1987-07-29 | 1987-07-29 | Output device for semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62189627A JPS6432719A (en) | 1987-07-29 | 1987-07-29 | Output device for semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6432719A true JPS6432719A (en) | 1989-02-02 |
Family
ID=16244461
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62189627A Pending JPS6432719A (en) | 1987-07-29 | 1987-07-29 | Output device for semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6432719A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2654883A1 (en) * | 1989-11-22 | 1991-05-24 | Mitsubishi Electric Corp | SWITCHING DEVICE DRIVING CIRCUIT. |
JPH0370429U (en) * | 1989-11-10 | 1991-07-15 | ||
US5057711A (en) * | 1989-05-31 | 1991-10-15 | Hyundai Electronics Industries Co., Ltd. | Noise reducing output buffer circuit for an integrated circuit |
-
1987
- 1987-07-29 JP JP62189627A patent/JPS6432719A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5057711A (en) * | 1989-05-31 | 1991-10-15 | Hyundai Electronics Industries Co., Ltd. | Noise reducing output buffer circuit for an integrated circuit |
JPH0370429U (en) * | 1989-11-10 | 1991-07-15 | ||
FR2654883A1 (en) * | 1989-11-22 | 1991-05-24 | Mitsubishi Electric Corp | SWITCHING DEVICE DRIVING CIRCUIT. |
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