JPS6460108A - Bidirectional cmos analog switch - Google Patents

Bidirectional cmos analog switch

Info

Publication number
JPS6460108A
JPS6460108A JP62217216A JP21721687A JPS6460108A JP S6460108 A JPS6460108 A JP S6460108A JP 62217216 A JP62217216 A JP 62217216A JP 21721687 A JP21721687 A JP 21721687A JP S6460108 A JPS6460108 A JP S6460108A
Authority
JP
Japan
Prior art keywords
analog switch
cmos analog
nmos7
bidirectional
bidirectional cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62217216A
Other languages
Japanese (ja)
Inventor
Shigeharu Yamamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62217216A priority Critical patent/JPS6460108A/en
Publication of JPS6460108A publication Critical patent/JPS6460108A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To stabilize the conducting resistance of a bidirectional CMOS analog switch and to reduce a chip size by causing the conducting resistance of the NMOS of the bidirectional CMOS analog switch not to depend on an input level. CONSTITUTION:A circuit to utilize the back gate bias effect of an NMOS7 and to cause the substrate potential of the NMOS7 to follow the input level, namely, an input level detecting circuit 2 is provided. An input 19 is connected to a center 18 of the gate area of the NMOS7 of a bidirectional CMOS analog switch part 1 and an output 20 is connected to a substrate 4 of the NMOS7 of the bidirectional CMOS analog switch part 1 respectively. Thus, the bidirectional CMOS analog switch part 1 prevent a defect for the conducting resistance of the NMOS7 of the bidirectional CMOS analog switch part 1 to depend on the input level in a conducting condition. Thus, the conducting resistance of the conducting condition of the bidirectional CMOS analog switch part 1 can be stabilized and the chip size can be reduced.
JP62217216A 1987-08-31 1987-08-31 Bidirectional cmos analog switch Pending JPS6460108A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62217216A JPS6460108A (en) 1987-08-31 1987-08-31 Bidirectional cmos analog switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62217216A JPS6460108A (en) 1987-08-31 1987-08-31 Bidirectional cmos analog switch

Publications (1)

Publication Number Publication Date
JPS6460108A true JPS6460108A (en) 1989-03-07

Family

ID=16700679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62217216A Pending JPS6460108A (en) 1987-08-31 1987-08-31 Bidirectional cmos analog switch

Country Status (1)

Country Link
JP (1) JPS6460108A (en)

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