JPS5776925A - Mos type circuit - Google Patents

Mos type circuit

Info

Publication number
JPS5776925A
JPS5776925A JP55151945A JP15194580A JPS5776925A JP S5776925 A JPS5776925 A JP S5776925A JP 55151945 A JP55151945 A JP 55151945A JP 15194580 A JP15194580 A JP 15194580A JP S5776925 A JPS5776925 A JP S5776925A
Authority
JP
Japan
Prior art keywords
mos inverter
stand
level
signal
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55151945A
Other languages
Japanese (ja)
Inventor
Katsuhiko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55151945A priority Critical patent/JPS5776925A/en
Publication of JPS5776925A publication Critical patent/JPS5776925A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To decrease the power consumption at stand-by, by providing an MOSFET between a gate common connecting point of a complementary MOS inverter and input and power supply terminals. CONSTITUTION:The drain of a P channel MOSFETT3 and the drain of an N channel MOSFETT4 are connected to an input terminal 11 of a C-MOS inverter, and the source of the MOSFETT4 is grounded. The gates of the both FETs are connected in common, and a signal of L level is applied at the use of the C-MOS inverter and a signal of H level is applied at stand-by. At stand-by, the FETT3 is nonconductive and the T4 is conductive, and a signal applied to a terminal 13 is not delivered to the input terminal 11 of the C-MOS inverter. In this case, since the terminal 11 is held at L level, an FETT1 is nonconductive and a current flowing to the both FETs does not flow to the C-MOS inverter.
JP55151945A 1980-10-29 1980-10-29 Mos type circuit Pending JPS5776925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55151945A JPS5776925A (en) 1980-10-29 1980-10-29 Mos type circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55151945A JPS5776925A (en) 1980-10-29 1980-10-29 Mos type circuit

Publications (1)

Publication Number Publication Date
JPS5776925A true JPS5776925A (en) 1982-05-14

Family

ID=15529634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55151945A Pending JPS5776925A (en) 1980-10-29 1980-10-29 Mos type circuit

Country Status (1)

Country Link
JP (1) JPS5776925A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58207726A (en) * 1982-05-28 1983-12-03 Nec Corp Semiconductor circuit
US4698529A (en) * 1984-05-30 1987-10-06 Fujitsu Limited Output control circuit to prevent output of initial spike noise
US4709172A (en) * 1985-08-19 1987-11-24 Dallas Semiconductor Corporation Input-voltage detector circuit for CMOS integrated circuit
JPS63253718A (en) * 1987-04-09 1988-10-20 Rohm Co Ltd Gate circuit
JPH01175412A (en) * 1987-12-29 1989-07-11 Fujitsu Ltd Semiconductor integrated circuit
JPH06325599A (en) * 1986-06-30 1994-11-25 Samsung Electron Co Ltd Data transmission circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58207726A (en) * 1982-05-28 1983-12-03 Nec Corp Semiconductor circuit
US4698529A (en) * 1984-05-30 1987-10-06 Fujitsu Limited Output control circuit to prevent output of initial spike noise
US4709172A (en) * 1985-08-19 1987-11-24 Dallas Semiconductor Corporation Input-voltage detector circuit for CMOS integrated circuit
JPH06325599A (en) * 1986-06-30 1994-11-25 Samsung Electron Co Ltd Data transmission circuit
JPS63253718A (en) * 1987-04-09 1988-10-20 Rohm Co Ltd Gate circuit
JPH0563050B2 (en) * 1987-04-09 1993-09-09 Rohm Kk
JPH01175412A (en) * 1987-12-29 1989-07-11 Fujitsu Ltd Semiconductor integrated circuit
JP2540178B2 (en) * 1987-12-29 1996-10-02 富士通株式会社 Semiconductor integrated circuit

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