JPS5718092A - Signal holding circuit - Google Patents

Signal holding circuit

Info

Publication number
JPS5718092A
JPS5718092A JP9153980A JP9153980A JPS5718092A JP S5718092 A JPS5718092 A JP S5718092A JP 9153980 A JP9153980 A JP 9153980A JP 9153980 A JP9153980 A JP 9153980A JP S5718092 A JPS5718092 A JP S5718092A
Authority
JP
Japan
Prior art keywords
circuit
signal
differential signal
amplifier circuit
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9153980A
Other languages
Japanese (ja)
Inventor
Hiroshi Gomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9153980A priority Critical patent/JPS5718092A/en
Publication of JPS5718092A publication Critical patent/JPS5718092A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element

Landscapes

  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To achieve a circuit suitable for making a high integrated circuit with a simple circuit constitution and less power consumption, by providing a specific amplifier circuit, broad band load inpedance, current Miller circuit, transistors (TRs), and a control circuit. CONSTITUTION:To one output terminal of a signal amplifier circuit having two output terminals leading out a desired differential signal E0 of two signals e1, e2 in opposite phase, a current Miller circuit is connected via a broad load impedance R11. As shown in Figure, an output TRQ23 and a differential signal storage capacitor C21 are provided. Further, a control circuit is provided to make the signal amplifier circuit turned on at a sampling period to obtain a differential signal to supply a differential signal E0 to the capacitor C21 and to make the signal amplifier circuit turned off in other period to hold the signal E0 stored in the capacitor C21.
JP9153980A 1980-07-04 1980-07-04 Signal holding circuit Pending JPS5718092A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9153980A JPS5718092A (en) 1980-07-04 1980-07-04 Signal holding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9153980A JPS5718092A (en) 1980-07-04 1980-07-04 Signal holding circuit

Publications (1)

Publication Number Publication Date
JPS5718092A true JPS5718092A (en) 1982-01-29

Family

ID=14029269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9153980A Pending JPS5718092A (en) 1980-07-04 1980-07-04 Signal holding circuit

Country Status (1)

Country Link
JP (1) JPS5718092A (en)

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