JPS5662427A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5662427A
JPS5662427A JP13853779A JP13853779A JPS5662427A JP S5662427 A JPS5662427 A JP S5662427A JP 13853779 A JP13853779 A JP 13853779A JP 13853779 A JP13853779 A JP 13853779A JP S5662427 A JPS5662427 A JP S5662427A
Authority
JP
Japan
Prior art keywords
logic
output
input
gate
fets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13853779A
Other languages
Japanese (ja)
Inventor
Kunihiko Hirashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP13853779A priority Critical patent/JPS5662427A/en
Publication of JPS5662427A publication Critical patent/JPS5662427A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Abstract

PURPOSE:To reduce the number of elements, by constituting the logic circuit through the use of two FETs of inverse conduction type each other. CONSTITUTION:An N channel type FETQ10 is connected between the 1st logic input terminal and the logic output terminal X, a P channel type FETQ20 is connected between the output terminal X and ground, and the 2nd logic input B is fed to the gate of both FETsQ10 and Q20. When both logic inputs A, B are at high level only, the output X is at high level, and in other case, the output X is all at low level to obtain 2-input AND gate output. Further, since both FETs are simultaneously ON only at the transition of input and one FET is always OFF, a low power consumption gate circuit specific to C-MOS can be obtained.
JP13853779A 1979-10-26 1979-10-26 Logic circuit Pending JPS5662427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13853779A JPS5662427A (en) 1979-10-26 1979-10-26 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13853779A JPS5662427A (en) 1979-10-26 1979-10-26 Logic circuit

Publications (1)

Publication Number Publication Date
JPS5662427A true JPS5662427A (en) 1981-05-28

Family

ID=15224463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13853779A Pending JPS5662427A (en) 1979-10-26 1979-10-26 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5662427A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57179285A (en) * 1981-04-27 1982-11-04 Nippon Oil Co Ltd Raw material pitch for carbon fiber
JPS59226A (en) * 1982-05-10 1984-01-05 旭化成マイクロシステム株式会社 Method of constructing logic circuit
JPS63245124A (en) * 1987-03-31 1988-10-12 Toshiba Corp Transmission type logic circuit
JPS6418314A (en) * 1987-07-13 1989-01-23 Mitsubishi Electric Corp Logic circuit
JPH02309816A (en) * 1989-05-25 1990-12-25 Nec Corp Logic computing element
FR2663479A1 (en) * 1990-06-13 1991-12-20 Samsung Electronics Co Ltd Logic circuit including two inputs and one output
JPH06197004A (en) * 1993-06-18 1994-07-15 Toshiba Corp Transmission type logic circuit
JP2006180197A (en) * 2004-12-22 2006-07-06 Nec Electronics Corp Logic circuit and word driver circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57179285A (en) * 1981-04-27 1982-11-04 Nippon Oil Co Ltd Raw material pitch for carbon fiber
JPH0148313B2 (en) * 1981-04-27 1989-10-18 Nippon Oil Co Ltd
JPS59226A (en) * 1982-05-10 1984-01-05 旭化成マイクロシステム株式会社 Method of constructing logic circuit
JPS63245124A (en) * 1987-03-31 1988-10-12 Toshiba Corp Transmission type logic circuit
JPS6418314A (en) * 1987-07-13 1989-01-23 Mitsubishi Electric Corp Logic circuit
JPH02309816A (en) * 1989-05-25 1990-12-25 Nec Corp Logic computing element
FR2663479A1 (en) * 1990-06-13 1991-12-20 Samsung Electronics Co Ltd Logic circuit including two inputs and one output
JPH06197004A (en) * 1993-06-18 1994-07-15 Toshiba Corp Transmission type logic circuit
JP2006180197A (en) * 2004-12-22 2006-07-06 Nec Electronics Corp Logic circuit and word driver circuit
JP4562515B2 (en) * 2004-12-22 2010-10-13 ルネサスエレクトロニクス株式会社 Logic circuit and word driver circuit

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