JPS57157539A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS57157539A JPS57157539A JP56042897A JP4289781A JPS57157539A JP S57157539 A JPS57157539 A JP S57157539A JP 56042897 A JP56042897 A JP 56042897A JP 4289781 A JP4289781 A JP 4289781A JP S57157539 A JPS57157539 A JP S57157539A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- layers
- substrate
- epitaxial
- increased
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To integrate I<2>L, a linear element and a bipolar element on a single substrate by selectively forming a buried layer having the structure of laminating or a single layer to the Si substrate and an epitaxial layer under an active region. CONSTITUTION:N<+> layers 4a-4c are buried onto the P type Si substrate 2, the N epitaxial layer 6 is stacked, N<+> layers 8a, 8b are stacked onto the layers 4a, 4b, an N<+> epitaxial layer 10 is laminated, and the epitaxial layers are isolated by P layers 12, 14, 16, 18 reaching the substrate 2. P<+> layers 30, 32 and 50, 52, 60 are formed simultaneously, N<+> layers 38, 40 and 54, 62, 64 are shaped, and the junction regions of the P<+> layer 32 and P layers 34, 36 are used as the resistors of element sections 22, 24. According to this constitution, the amount of holes stored decreases because an N<+> layer 10a is thin in the I<2>L 10, speed is increased, a current amplification factor is augmented, and integration can be heightened. Since an N<+> layer 10b is thin in the bipolar element 22, speed is increased, series resistance is low, and output voltage at the time of saturation is low. With the linear element 24, the epitaxial layer can be laminated in desired thickness, a layer such as a layer 6c is thickened, concentration is kept at low concentration regardless of regions 20, 22, and dielectric resistance can be increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56042897A JPS57157539A (en) | 1981-03-24 | 1981-03-24 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56042897A JPS57157539A (en) | 1981-03-24 | 1981-03-24 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57157539A true JPS57157539A (en) | 1982-09-29 |
Family
ID=12648814
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56042897A Pending JPS57157539A (en) | 1981-03-24 | 1981-03-24 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57157539A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5121185A (en) * | 1987-10-09 | 1992-06-09 | Hitachi, Ltd. | Monolithic semiconductor IC device including blocks having different functions with different breakdown voltages |
CN109244060A (en) * | 2017-07-11 | 2019-01-18 | 台湾积体电路制造股份有限公司 | Semiconductor devices and forming method thereof |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5010586A (en) * | 1973-05-25 | 1975-02-03 |
-
1981
- 1981-03-24 JP JP56042897A patent/JPS57157539A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5010586A (en) * | 1973-05-25 | 1975-02-03 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5121185A (en) * | 1987-10-09 | 1992-06-09 | Hitachi, Ltd. | Monolithic semiconductor IC device including blocks having different functions with different breakdown voltages |
CN109244060A (en) * | 2017-07-11 | 2019-01-18 | 台湾积体电路制造股份有限公司 | Semiconductor devices and forming method thereof |
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