JPS57136360A - Manufacture of semiconductor memory unit - Google Patents
Manufacture of semiconductor memory unitInfo
- Publication number
- JPS57136360A JPS57136360A JP56022781A JP2278181A JPS57136360A JP S57136360 A JPS57136360 A JP S57136360A JP 56022781 A JP56022781 A JP 56022781A JP 2278181 A JP2278181 A JP 2278181A JP S57136360 A JPS57136360 A JP S57136360A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- gate electrode
- gate
- memory cell
- thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To improve inferior withstand voltage, etc., of semiconductor memory unit by a method wherein a thin oxide film is formed on a memory cell region and a thick oxide film is formed on a circumferential circuit region separated with each other, and the first gate electrode of the memory and a gate electrode of the circumferential circuit are formed by the same polycrystalline Si layer. CONSTITUTION:A thick field oxide film 102 is provided on a p type Si substrate 101, plural island type regions are formed, the thin gate oxide film 110 is provided on the memory cell region, and the thick gate oxide film 111 is provided on the circumferential circuit region. Then the polycrystalline Si layer is provided on the whole surface, and after the first gate electrode 108 and the gate electrode 109 are formed by patterning, the surface is oxidized, and after the second electrode 114 is provided, the oxide film at the unnecessitated part is removed, and n type regions 116-118 are formed by diffusion. Accordingly short-circuit and inferior withstand voltage at the circumferential circuit are prevented, and moreover capacitance of the two layers gate memory cell can be enlarged to enhance reliability.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56022781A JPS57136360A (en) | 1981-02-18 | 1981-02-18 | Manufacture of semiconductor memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56022781A JPS57136360A (en) | 1981-02-18 | 1981-02-18 | Manufacture of semiconductor memory unit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57136360A true JPS57136360A (en) | 1982-08-23 |
JPH0122990B2 JPH0122990B2 (en) | 1989-04-28 |
Family
ID=12092207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56022781A Granted JPS57136360A (en) | 1981-02-18 | 1981-02-18 | Manufacture of semiconductor memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57136360A (en) |
-
1981
- 1981-02-18 JP JP56022781A patent/JPS57136360A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0122990B2 (en) | 1989-04-28 |
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