JPS5694659A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5694659A JPS5694659A JP17073379A JP17073379A JPS5694659A JP S5694659 A JPS5694659 A JP S5694659A JP 17073379 A JP17073379 A JP 17073379A JP 17073379 A JP17073379 A JP 17073379A JP S5694659 A JPS5694659 A JP S5694659A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- capacitor
- polycrystalline
- constitution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To increase the capacity of a capacitor by mixing impurities in an SiO2 insulation film constituting the capacitor and thereby raising specific inductive capacity in the case when MOSFET and the MOS diode type capacitor are formed integrally into IC on the same semiconductor substrate. CONSTITUTION:A thick field oxidized film 7 is formed around the Si substrate 6 and a thin gate SiO2 film 10a is connected to the surface of the substrate 6 surrounded by the film 7. In this constitution, boron ions 18 as impurities are struck into the film 10a after it is formed and thereby the specific inductive capacity of the film 10a is increased. That is, B2H6 of 1-10% is added to O2 ambience when the film 10a is formed. After that, the 1st polycrystalline Si electrode which is to be the capacitor 2 is formed and further the 2nd polycrystalline Si substrate 4 is provided with a part thereof overlapping on the former, through the intermediary of an oxidized insulation film 10b. Then, an opening is made in the film 10a contacting with the substrate 4 and an N<+> type region 5 to form a bit line is formed diffusely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17073379A JPS5694659A (en) | 1979-12-27 | 1979-12-27 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17073379A JPS5694659A (en) | 1979-12-27 | 1979-12-27 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5694659A true JPS5694659A (en) | 1981-07-31 |
Family
ID=15910373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17073379A Pending JPS5694659A (en) | 1979-12-27 | 1979-12-27 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5694659A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6094761A (en) * | 1983-10-28 | 1985-05-27 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1979
- 1979-12-27 JP JP17073379A patent/JPS5694659A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6094761A (en) * | 1983-10-28 | 1985-05-27 | Fujitsu Ltd | Manufacture of semiconductor device |
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