JPS5691433A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5691433A
JPS5691433A JP16810679A JP16810679A JPS5691433A JP S5691433 A JPS5691433 A JP S5691433A JP 16810679 A JP16810679 A JP 16810679A JP 16810679 A JP16810679 A JP 16810679A JP S5691433 A JPS5691433 A JP S5691433A
Authority
JP
Japan
Prior art keywords
nitride film
substrate
film
window
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16810679A
Other languages
Japanese (ja)
Inventor
Osamu Hataishi
Yunosuke Kawabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16810679A priority Critical patent/JPS5691433A/en
Publication of JPS5691433A publication Critical patent/JPS5691433A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers

Abstract

PURPOSE:To make a self matching window which enables high integration by providing a thick oxide film mask on an Si substrate, then providing a thin nitride film on the substrate surface in its opening and forming a window with a boundary in the opening part by selectively etching a part of the nitride film. CONSTITUTION:A thick SiO2 film 3 is provided on the surface of an Si substrate 1 by a thermo oxidizing method, and after opening a window 3a, a nitride film 12 is formed by implanting N<+> ions 10 to the exposed surface of the substrate 1. Through this nitride film 12, is formed, for example, the base 5 of a transistor, then removing the nitride film 12 selectively with a liquid which etches the nitride film 12 with priority to the SiO2 film 3, a part of the base is exposed. Then, a photoresist 4 is formed only on the SiO2 film 3 in one direction of the substrate 1, and in the direction perpendicular to the former, it is formed also on the nitride film 12 except the selectively etched part. By so doing, an emitter diffusing window can be opened surely by self matching with the thick SiO2 film 3.
JP16810679A 1979-12-26 1979-12-26 Preparation of semiconductor device Pending JPS5691433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16810679A JPS5691433A (en) 1979-12-26 1979-12-26 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16810679A JPS5691433A (en) 1979-12-26 1979-12-26 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5691433A true JPS5691433A (en) 1981-07-24

Family

ID=15861948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16810679A Pending JPS5691433A (en) 1979-12-26 1979-12-26 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5691433A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6829134B2 (en) 2002-07-09 2004-12-07 Murata Manufacturing Co., Ltd. Laminated ceramic electronic component and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6829134B2 (en) 2002-07-09 2004-12-07 Murata Manufacturing Co., Ltd. Laminated ceramic electronic component and method for manufacturing the same

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