KR920010752A - Method of forming isolation film for semiconductor device - Google Patents

Method of forming isolation film for semiconductor device Download PDF

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Publication number
KR920010752A
KR920010752A KR1019900018180A KR900018180A KR920010752A KR 920010752 A KR920010752 A KR 920010752A KR 1019900018180 A KR1019900018180 A KR 1019900018180A KR 900018180 A KR900018180 A KR 900018180A KR 920010752 A KR920010752 A KR 920010752A
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KR
South Korea
Prior art keywords
oxide film
silicon
forming
silicon substrate
trench
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KR1019900018180A
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Korean (ko)
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KR930008849B1 (en
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전영권
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문정환
금성일렉트론 주식회사
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Priority to KR1019900018180A priority Critical patent/KR930008849B1/en
Publication of KR920010752A publication Critical patent/KR920010752A/en
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Publication of KR930008849B1 publication Critical patent/KR930008849B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

내용 없음No content

Description

반도체 소자의 격리막 형성방법Method of forming isolation film for semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 공정 단면도.2 is a cross-sectional view of the process of the present invention.

Claims (2)

실리콘 기판위에 패드산화막과 제1실리콘 질화막 및 산화막을 차례로 형성하고, 포토/에치공정을 거쳐 트렌치 마스크를 형성하는 단계, 상기 트렌치 마스크의 개구부 측벽에 측벽폴리실리콘을 형성하는 단계, 상기 개구부내의 측벽 폴리실리콘과 실리콘 기판을 에치하여 실리콘 기판내에 경사 트렌치를 형성하는 단계, 제2실리콘 질화막과 산화막을 차례로 형성하고, 이 산화막 두께이상으로 에치하여 개구부 및 경사트렌치 내에 측벽 산화막을 형성함과 동시에 개구부내의 측벽 산화막이 덮히지 않는 제2실리콘 질화막을 제거하여 실리콘 기판을 오픈시킨다음 채널 스톱이온을 주입하는 단계, 경사 트렌치내에 필드산화를 행하여 필드산화막을 형성하는 단계가 차례로 포함됨을 특징으로 하는 반도체 소자의 격리막 형성방법.Forming a pad oxide film, a first silicon nitride film, and an oxide film on a silicon substrate, and forming a trench mask through a photo / etch process; forming sidewall polysilicon on the sidewalls of the openings of the trench mask; Etching the silicon and the silicon substrate to form an inclined trench in the silicon substrate, forming a second silicon nitride film and an oxide film in turn, and etching the silicon oxide film to a thickness greater than or equal to this oxide film to form a sidewall oxide film in the opening and the inclined trench, and simultaneously Removing the second silicon nitride film not covered by the oxide film to open the silicon substrate, and injecting channel stop ions, followed by field oxidation in the inclined trench to form a field oxide film. Formation method. 제1항에 있어서, 측벽을 폴리실리콘의 실리콘 기판에 대한 에치 선택도는 1이상이 되도록 함을 특징으로 하는 반도체 소자의 격리막 형성방법.2. The method of claim 1, wherein the sidewalls are etch selectivity of polysilicon with respect to the silicon substrate. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900018180A 1990-11-10 1990-11-10 Isolating film forming method of semiconductor device KR930008849B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900018180A KR930008849B1 (en) 1990-11-10 1990-11-10 Isolating film forming method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900018180A KR930008849B1 (en) 1990-11-10 1990-11-10 Isolating film forming method of semiconductor device

Publications (2)

Publication Number Publication Date
KR920010752A true KR920010752A (en) 1992-06-27
KR930008849B1 KR930008849B1 (en) 1993-09-16

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900018180A KR930008849B1 (en) 1990-11-10 1990-11-10 Isolating film forming method of semiconductor device

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KR (1) KR930008849B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100415440B1 (en) * 2001-04-19 2004-01-24 주식회사 하이닉스반도체 Method for forming the Isolation Layer and body contact of Semiconductor Device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100415440B1 (en) * 2001-04-19 2004-01-24 주식회사 하이닉스반도체 Method for forming the Isolation Layer and body contact of Semiconductor Device

Also Published As

Publication number Publication date
KR930008849B1 (en) 1993-09-16

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