JPS55160445A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS55160445A
JPS55160445A JP6761279A JP6761279A JPS55160445A JP S55160445 A JPS55160445 A JP S55160445A JP 6761279 A JP6761279 A JP 6761279A JP 6761279 A JP6761279 A JP 6761279A JP S55160445 A JPS55160445 A JP S55160445A
Authority
JP
Japan
Prior art keywords
layer
type
film
mask
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6761279A
Other languages
Japanese (ja)
Other versions
JPS588140B2 (en
Inventor
Osamu Hataishi
Yoshinobu Monma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6761279A priority Critical patent/JPS588140B2/en
Priority to DE8080301781T priority patent/DE3071380D1/en
Priority to EP19800301781 priority patent/EP0020144B1/en
Priority to US06/155,124 priority patent/US4376664A/en
Publication of JPS55160445A publication Critical patent/JPS55160445A/en
Publication of JPS588140B2 publication Critical patent/JPS588140B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To accurately obatin an isolating layer in size by forming the first mask on an Si3N4 film on an Si substrate, introducing impurity through the Si3N4 film into the substrate, subsequently forming the second mask thereon, perforating an opening at the first mask, removing the Si3N4 film for oxidation. CONSTITUTION:The Si3N4 film 24 is formed on the N type epitaxial layer 2 on a P type Si substrate 1 havcing an N<+> type buried layer 3. An SiO2 mask 25 is superimposed thereon, selectively masked with resist, B ion is implanted to the portion to be formed with an isolation layer, P ion is implanted to the portions to be formed with a P<+> type layer 28 and a collector connecting layer so as to form an N<+> type layer 30. An Mo layer 31 is selectively coated on the layers 28, 30, the film 24 is then etched to etch the exposed epitaxial layer. When it is treated at high temperature finally, B is diffused from the P type layer 28 to reach the substrate, P is diffused from the isolation layer 32 and the N type layer 30 to complete a collector connecting layer 33 to be coated with a thick SiO2 film 34. According to this metod, since impurity is added for forming an isolation layer before forming the surface oxide film between the periphery of the element and the isolation layer, it can be finely formed in size to improve the integrating degree of the semiconductor device.
JP6761279A 1979-05-31 1979-05-31 Manufacturing method of semiconductor device Expired JPS588140B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP6761279A JPS588140B2 (en) 1979-05-31 1979-05-31 Manufacturing method of semiconductor device
DE8080301781T DE3071380D1 (en) 1979-05-31 1980-05-29 Method of producing a semiconductor device
EP19800301781 EP0020144B1 (en) 1979-05-31 1980-05-29 Method of producing a semiconductor device
US06/155,124 US4376664A (en) 1979-05-31 1980-05-30 Method of producing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6761279A JPS588140B2 (en) 1979-05-31 1979-05-31 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS55160445A true JPS55160445A (en) 1980-12-13
JPS588140B2 JPS588140B2 (en) 1983-02-14

Family

ID=13349942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6761279A Expired JPS588140B2 (en) 1979-05-31 1979-05-31 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS588140B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583246A (en) * 1981-06-29 1983-01-10 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583246A (en) * 1981-06-29 1983-01-10 Fujitsu Ltd Manufacture of semiconductor device
JPH0241169B2 (en) * 1981-06-29 1990-09-14 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS588140B2 (en) 1983-02-14

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