JPS54121684A - Manufacture of semkconductor device - Google Patents

Manufacture of semkconductor device

Info

Publication number
JPS54121684A
JPS54121684A JP2883478A JP2883478A JPS54121684A JP S54121684 A JPS54121684 A JP S54121684A JP 2883478 A JP2883478 A JP 2883478A JP 2883478 A JP2883478 A JP 2883478A JP S54121684 A JPS54121684 A JP S54121684A
Authority
JP
Japan
Prior art keywords
film
resist
width
field oxide
channel stopper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2883478A
Other languages
Japanese (ja)
Inventor
Takehide Shirato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2883478A priority Critical patent/JPS54121684A/en
Publication of JPS54121684A publication Critical patent/JPS54121684A/en
Pending legal-status Critical Current

Links

Landscapes

  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To form a channel stopper featuring a narrower width than the field oxide film without increasing the mask manufacturing processes and via the softening of the resist film.
CONSTITUTION: Si3N4 film 30 is provided to SiO220 on P-type Si substrate 10, and resist pattern 40 through the photo etching to etch film 30. Pattern 40 is then softened and liquefied in N2 and at about 200°C with a larger width than remaining Si3N4 film. The B ion is injected onto the substrate surface via the resist mask, and then the resist is removed. Then the selective oxidation is given using film 30 as the mask, and thus the B diffusion is given simultaneously to form field oxide film 25 and P+-type channel stopper 50. After this, film 30 is removed and film 20 is removed when necessary to form the stack element on the substrate. As the channel stopper width is sufficiently smaller than the width of the field oxide film.
COPYRIGHT: (C)1979,JPO&Japio
JP2883478A 1978-03-14 1978-03-14 Manufacture of semkconductor device Pending JPS54121684A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2883478A JPS54121684A (en) 1978-03-14 1978-03-14 Manufacture of semkconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2883478A JPS54121684A (en) 1978-03-14 1978-03-14 Manufacture of semkconductor device

Publications (1)

Publication Number Publication Date
JPS54121684A true JPS54121684A (en) 1979-09-20

Family

ID=12259401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2883478A Pending JPS54121684A (en) 1978-03-14 1978-03-14 Manufacture of semkconductor device

Country Status (1)

Country Link
JP (1) JPS54121684A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501448A (en) * 1981-09-08 1983-08-25 エヌ・シ−・ア−ル・コ−ポレ−シヨン Method of manufacturing integrated circuit structures
US4814290A (en) * 1987-10-30 1989-03-21 International Business Machines Corporation Method for providing increased dopant concentration in selected regions of semiconductor devices
US5208181A (en) * 1992-08-17 1993-05-04 Chartered Semiconductor Manufacturing Pte Ltd. Locos isolation scheme for small geometry or high voltage circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501448A (en) * 1981-09-08 1983-08-25 エヌ・シ−・ア−ル・コ−ポレ−シヨン Method of manufacturing integrated circuit structures
JPH0519308B2 (en) * 1981-09-08 1993-03-16 Ncr Co
US4814290A (en) * 1987-10-30 1989-03-21 International Business Machines Corporation Method for providing increased dopant concentration in selected regions of semiconductor devices
US5208181A (en) * 1992-08-17 1993-05-04 Chartered Semiconductor Manufacturing Pte Ltd. Locos isolation scheme for small geometry or high voltage circuit

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