JPS5648152A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5648152A
JPS5648152A JP12358979A JP12358979A JPS5648152A JP S5648152 A JPS5648152 A JP S5648152A JP 12358979 A JP12358979 A JP 12358979A JP 12358979 A JP12358979 A JP 12358979A JP S5648152 A JPS5648152 A JP S5648152A
Authority
JP
Japan
Prior art keywords
outlines
film
layer insulating
insulating film
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12358979A
Other languages
Japanese (ja)
Inventor
Toru Imamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP12358979A priority Critical patent/JPS5648152A/en
Publication of JPS5648152A publication Critical patent/JPS5648152A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the breaking of a wire by forming gentle stepped sections at a part of the outlines of the opened hole of the first layer insulating film and those of the second layer insulating film on a semiconductor substrate. CONSTITUTION:The first layer insulating film 2 located on an Si substrate 1 completed element formation is opened 3 and the second layer insulating film 4 is placed on the film 2. An opening 5 slightly bigger than the opening 3 is provided on the film 4. The holes 3, 5 shift each other by the outlines 7, 8 where an Al pattern overlaps each other and the remaining outlines shift by a lag caused by an alignment with a photomask and the Si substrate. As a result, the outlines 7, 8 cause a stepped difference in level and the ramining outlines cause a difference in level corresponding to the sum of the film thickness. Therefore, the Al thin film 6 has no sharp difference in level which causes no thinner section than a flat section and the breaking of a wire will be prevented. The yield and quality will be improved.
JP12358979A 1979-09-26 1979-09-26 Semiconductor device Pending JPS5648152A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12358979A JPS5648152A (en) 1979-09-26 1979-09-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12358979A JPS5648152A (en) 1979-09-26 1979-09-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5648152A true JPS5648152A (en) 1981-05-01

Family

ID=14864329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12358979A Pending JPS5648152A (en) 1979-09-26 1979-09-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5648152A (en)

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