JPS56155551A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56155551A
JPS56155551A JP5817780A JP5817780A JPS56155551A JP S56155551 A JPS56155551 A JP S56155551A JP 5817780 A JP5817780 A JP 5817780A JP 5817780 A JP5817780 A JP 5817780A JP S56155551 A JPS56155551 A JP S56155551A
Authority
JP
Japan
Prior art keywords
openings
semiconductor device
constitution
reliability
yield
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5817780A
Other languages
Japanese (ja)
Inventor
Ryosuke Araki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP5817780A priority Critical patent/JPS56155551A/en
Publication of JPS56155551A publication Critical patent/JPS56155551A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To enable to transcribe the pattern of the whole openings in the most suitable condition, and to contrive to enhance yield and the reliability of the semiconductor device by accurate transcription by a method wherein the size and the form of the openings in an insulating film are made wholley to the same. CONSTITUTION:The opening pattersn 21, 22 of the same size and form are provided on a mask, and the patterns 25, 26 are transcribed on a substrate. By this constitution, protruding of the openings from wirings 23, 24 is avoided, and the reliability and yield can be enhanced as compared with the conventional method.
JP5817780A 1980-05-01 1980-05-01 Semiconductor device Pending JPS56155551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5817780A JPS56155551A (en) 1980-05-01 1980-05-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5817780A JPS56155551A (en) 1980-05-01 1980-05-01 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56155551A true JPS56155551A (en) 1981-12-01

Family

ID=13076713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5817780A Pending JPS56155551A (en) 1980-05-01 1980-05-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56155551A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194542A (en) * 1984-03-16 1985-10-03 Rohm Co Ltd Forming method of pattern for inter-layer insulating film
JPS60234212A (en) * 1984-05-07 1985-11-20 Sony Corp Etching method
US7249293B2 (en) 2001-04-17 2007-07-24 Fujitsu Limited Method and device for testing for the occurrence of bit errors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194542A (en) * 1984-03-16 1985-10-03 Rohm Co Ltd Forming method of pattern for inter-layer insulating film
JPS60234212A (en) * 1984-05-07 1985-11-20 Sony Corp Etching method
US7249293B2 (en) 2001-04-17 2007-07-24 Fujitsu Limited Method and device for testing for the occurrence of bit errors

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