JPS57103331A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57103331A
JPS57103331A JP17880680A JP17880680A JPS57103331A JP S57103331 A JPS57103331 A JP S57103331A JP 17880680 A JP17880680 A JP 17880680A JP 17880680 A JP17880680 A JP 17880680A JP S57103331 A JPS57103331 A JP S57103331A
Authority
JP
Japan
Prior art keywords
layer
regions
covered
metallic wiring
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17880680A
Other languages
Japanese (ja)
Inventor
Isao Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP17880680A priority Critical patent/JPS57103331A/en
Publication of JPS57103331A publication Critical patent/JPS57103331A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To improve the manufacturing yield of a semiconductor device by forming the prescribed diffused region in a semiconductor substrat, covering the substrate with an insulating layer, opening a hole, covering the regions with metallic wiring layer contacted with the regions, forming an intermediate insulating layer on the overall surface and selecting a pattern of a resist layer when holes for forming the upper metallic wiring layer are opened. CONSTITUTION:A plurality of P type regions 22 and N type regions 12 having different impurity density from an N type Si substrate 21 are diffused in the substrate 21, an insulating layer 24 such as Si3N4 is covered on the overall surface, holes 25, 26 are opened, and metallic wiring layer 27 contacted with the regions 22, 23 is formed in the hole 25. Then, an intermediate insulating layer 28 is covered on the overall surface, a resist layer 35 is covered, a pattern is designed, and holes 29 corresponding to one region 22 and region 23 and a hole 30 corresponding to the hole 26 are precisely formed at the layer 35. Thereafter, an upper metallic wiring layer 32 connected to the metallic wiring layer 27 are covered while extending on the layer 28, these steps are repeated as required, thereby obtaining multilayer wiring structure.
JP17880680A 1980-12-19 1980-12-19 Manufacture of semiconductor device Pending JPS57103331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17880680A JPS57103331A (en) 1980-12-19 1980-12-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17880680A JPS57103331A (en) 1980-12-19 1980-12-19 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57103331A true JPS57103331A (en) 1982-06-26

Family

ID=16054971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17880680A Pending JPS57103331A (en) 1980-12-19 1980-12-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57103331A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4910670A (en) * 1972-05-24 1974-01-30
JPS49114367A (en) * 1973-02-28 1974-10-31

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4910670A (en) * 1972-05-24 1974-01-30
JPS49114367A (en) * 1973-02-28 1974-10-31

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