JPS5490979A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPS5490979A JPS5490979A JP15204578A JP15204578A JPS5490979A JP S5490979 A JPS5490979 A JP S5490979A JP 15204578 A JP15204578 A JP 15204578A JP 15204578 A JP15204578 A JP 15204578A JP S5490979 A JPS5490979 A JP S5490979A
- Authority
- JP
- Japan
- Prior art keywords
- type
- sio2 film
- transistor
- enhancement
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
Abstract
PURPOSE:To make suitable the IC the massproduction, by forming the transistor region of enhancement and depletion type, and by selecting the type of transistor as required, or forming the both at the same time. CONSTITUTION:The SiO2 film 2 is coated on the N type Si substrate 1, the region forming the enhancement transistor 3 and depletion type transistor 4 is removed, and the thin SiO2 film is produced on it. Next, the SiO2 film corresponding to the source, drain and cross under region is removed, and the P type polycrystal Si layer 4 and the SiO2 film 5 are grown on the entire surface. After that, the polycrystal layers 532 and 542 being the gate of two transistors are made independent with photo etching, and the P type source and drain regions 931, 941, 933 and 943 are formed in the substrate 1 at the both sides by diffusion. Next, the SiO2 film 7 is coated on the entire surface, opening is provided, and the electrode 832 when the enhancement type is desired to obtain, and the electrode 842 when the depletion type is desired, are respectively selected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15204578A JPS5490979A (en) | 1978-12-11 | 1978-12-11 | Integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15204578A JPS5490979A (en) | 1978-12-11 | 1978-12-11 | Integrated circuit |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4126572A Division JPS5417269B2 (en) | 1972-04-26 | 1972-04-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5490979A true JPS5490979A (en) | 1979-07-19 |
JPS5436466B2 JPS5436466B2 (en) | 1979-11-09 |
Family
ID=15531840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15204578A Granted JPS5490979A (en) | 1978-12-11 | 1978-12-11 | Integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5490979A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5789253A (en) * | 1980-11-25 | 1982-06-03 | Seiko Epson Corp | Semiconductor device |
-
1978
- 1978-12-11 JP JP15204578A patent/JPS5490979A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5789253A (en) * | 1980-11-25 | 1982-06-03 | Seiko Epson Corp | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS5436466B2 (en) | 1979-11-09 |
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