JPS56144532A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56144532A
JPS56144532A JP4765680A JP4765680A JPS56144532A JP S56144532 A JPS56144532 A JP S56144532A JP 4765680 A JP4765680 A JP 4765680A JP 4765680 A JP4765680 A JP 4765680A JP S56144532 A JPS56144532 A JP S56144532A
Authority
JP
Japan
Prior art keywords
layer
film
mask
window
ion implantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4765680A
Other languages
Japanese (ja)
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4765680A priority Critical patent/JPS56144532A/en
Priority to US06/240,130 priority patent/US4381201A/en
Priority to DE8181101579T priority patent/DE3168424D1/en
Priority to EP81101579A priority patent/EP0036137B1/en
Publication of JPS56144532A publication Critical patent/JPS56144532A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To uniformly distribute impurities to the required pattern part only by forming a mask on a semiconductor layer by the material reflecting laser beams wherein a laser is bombarded at the mask after injecting impurities into the semiconductor layer in the window. CONSTITUTION:An SiO2 film 2 is formed on an Si substrate 1 and a poly crystalline Si layer is formed on the film 2. Furthermore, a p type monocrystal Si layer 3 is formed on the poly crystalline Si layer. Next, a film 6 serving as a mask for laser beam reflection and ion implantation is formed. Next, patterning is applied to the film 6 to open a window 6A for forming an impurity-leading region. Next, for example, As ion implantation is done to shallowly form an n<+> type impurity-leading region 7. Next, anneal by laser beam is performed and As is deeply and uniformly dispersed in the direction of layer 3 thickness and activated by melting the monocrystal Si at the region controlled by the window 6A for recrystallization.
JP4765680A 1980-03-11 1980-04-11 Manufacture of semiconductor device Pending JPS56144532A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP4765680A JPS56144532A (en) 1980-04-11 1980-04-11 Manufacture of semiconductor device
US06/240,130 US4381201A (en) 1980-03-11 1981-03-03 Method for production of semiconductor devices
DE8181101579T DE3168424D1 (en) 1980-03-11 1981-03-05 Method for production of semiconductor devices
EP81101579A EP0036137B1 (en) 1980-03-11 1981-03-05 Method for production of semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4765680A JPS56144532A (en) 1980-04-11 1980-04-11 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56144532A true JPS56144532A (en) 1981-11-10

Family

ID=12781293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4765680A Pending JPS56144532A (en) 1980-03-11 1980-04-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56144532A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58130554A (en) * 1982-01-28 1983-08-04 Toshiba Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58130554A (en) * 1982-01-28 1983-08-04 Toshiba Corp Manufacture of semiconductor device

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