JPS5646522A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS5646522A
JPS5646522A JP12287479A JP12287479A JPS5646522A JP S5646522 A JPS5646522 A JP S5646522A JP 12287479 A JP12287479 A JP 12287479A JP 12287479 A JP12287479 A JP 12287479A JP S5646522 A JPS5646522 A JP S5646522A
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
single crystal
layer
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12287479A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP12287479A priority Critical patent/JPS5646522A/en
Publication of JPS5646522A publication Critical patent/JPS5646522A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To form an extremely thin active semiconductor region by forming a semi-insulating layer of low grade nitride or oxide and a single crystal semiconductor layer on a substrate having a single crystal surface. CONSTITUTION:An insulating or semi-insulating film 2 of low grade oxide or nitride is formed on a single crystal semiconductor substrate 1. Then, a semiconductor layer 3 is formed on a film 2. High intensity light energy such as laser, xenon light equivalent to laser, sun light, or the like is irradiated to said layers 2 and 3. The temperature of the surface of the semiconductor rises quickly by the light, the crystallization determined by the crystal azimuth on the surface of the substrate 1 occurs in an insulating layer 4. Said crystallization occurs in a semiconductor layer 5 which is located on the layer 4. Therefore, both the layers 4 and 5 become single crystal. The crystallizing way of the semiconductor layers coincides or approximately coincides with that of the substrate. In this way, the thickness of the active semiconductor region can be made extremely thin. Furthermore, one region of the active semiconductor can be completely separated from the other region each other.
JP12287479A 1979-09-25 1979-09-25 Semiconductor device and manufacture thereof Pending JPS5646522A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12287479A JPS5646522A (en) 1979-09-25 1979-09-25 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12287479A JPS5646522A (en) 1979-09-25 1979-09-25 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS5646522A true JPS5646522A (en) 1981-04-27

Family

ID=14846757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12287479A Pending JPS5646522A (en) 1979-09-25 1979-09-25 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5646522A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4509990A (en) * 1982-11-15 1985-04-09 Hughes Aircraft Company Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates
US4693758A (en) * 1980-06-18 1987-09-15 Hitachi, Ltd. Method of making devices in silicon, on insulator regrown by laser beam
US7642584B2 (en) 1991-09-25 2010-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4693758A (en) * 1980-06-18 1987-09-15 Hitachi, Ltd. Method of making devices in silicon, on insulator regrown by laser beam
US4509990A (en) * 1982-11-15 1985-04-09 Hughes Aircraft Company Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates
US7642584B2 (en) 1991-09-25 2010-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same

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