JPS56111239A - Preparation of semiconductor device - Google Patents
Preparation of semiconductor deviceInfo
- Publication number
- JPS56111239A JPS56111239A JP16180A JP16180A JPS56111239A JP S56111239 A JPS56111239 A JP S56111239A JP 16180 A JP16180 A JP 16180A JP 16180 A JP16180 A JP 16180A JP S56111239 A JPS56111239 A JP S56111239A
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- substrate
- island region
- selectively
- amorphous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
Abstract
PURPOSE:To minimize defects and obtain a single crystal island region, by coating a single crystal Si substrate with polycrystalline Si or amorphous Si film by means of a conductive film, farming its single crystal by laser annealing and oxidizing it selectively. CONSTITUTION:An SiO2 film 11 is formed on a P type Si single crystal substrate 10 with a selectively made opening, and a poly or an amorphous Si 12 is formed. Then it is converted into a single crystal Si 13 after laser beam application and heating. The layer 13 and the substrate 10 are of the same dimensional direction. Thereafter, an Si3N4 mask 15A, 15B are formed and selectively oxidized to have an isolation layer 14 and the island regions 13A, 13B are formed. In the island region, a bipolar transistor and an insulated gate FET are formed respectively as an instance. With such an arrangement, the single crystal island region can easily be obtained with relatively fewer defects and smaller parasitic volume, mutually insulated and separated. Furthermore, double-layered IC are realized on both the substrate and the single crystal, resulting in the greater integration.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16180A JPS56111239A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16180A JPS56111239A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56111239A true JPS56111239A (en) | 1981-09-02 |
Family
ID=11466311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16180A Pending JPS56111239A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56111239A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58102517A (en) * | 1981-12-14 | 1983-06-18 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS59106132A (en) * | 1982-12-09 | 1984-06-19 | Nec Corp | Manufacture of semiconductor device |
JPS59171114A (en) * | 1983-03-18 | 1984-09-27 | Agency Of Ind Science & Technol | Manufacture of semiconductor single crystal film |
JPH01147827A (en) * | 1987-12-04 | 1989-06-09 | Agency Of Ind Science & Technol | Manufacture of multilayer semiconductor substrate |
US5580815A (en) * | 1993-08-12 | 1996-12-03 | Motorola Inc. | Process for forming field isolation and a structure over a semiconductor substrate |
-
1980
- 1980-01-07 JP JP16180A patent/JPS56111239A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58102517A (en) * | 1981-12-14 | 1983-06-18 | Fujitsu Ltd | Manufacture of semiconductor device |
JPH0335833B2 (en) * | 1981-12-14 | 1991-05-29 | Fujitsu Ltd | |
JPS59106132A (en) * | 1982-12-09 | 1984-06-19 | Nec Corp | Manufacture of semiconductor device |
JPH0512856B2 (en) * | 1982-12-09 | 1993-02-19 | Nippon Electric Co | |
JPS59171114A (en) * | 1983-03-18 | 1984-09-27 | Agency Of Ind Science & Technol | Manufacture of semiconductor single crystal film |
JPH01147827A (en) * | 1987-12-04 | 1989-06-09 | Agency Of Ind Science & Technol | Manufacture of multilayer semiconductor substrate |
US5580815A (en) * | 1993-08-12 | 1996-12-03 | Motorola Inc. | Process for forming field isolation and a structure over a semiconductor substrate |
US5707889A (en) * | 1993-08-12 | 1998-01-13 | Motorola Inc. | Process for forming field isolation |
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