JPS57122565A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57122565A
JPS57122565A JP56008536A JP853681A JPS57122565A JP S57122565 A JPS57122565 A JP S57122565A JP 56008536 A JP56008536 A JP 56008536A JP 853681 A JP853681 A JP 853681A JP S57122565 A JPS57122565 A JP S57122565A
Authority
JP
Japan
Prior art keywords
fuses
film
laser beam
substrate
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56008536A
Other languages
Japanese (ja)
Inventor
Yutaka Hatano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56008536A priority Critical patent/JPS57122565A/en
Publication of JPS57122565A publication Critical patent/JPS57122565A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To enable the selective melting of thin film fuses in a semiconductor IC by the emission of a laser beam thereto by forming the fuses in a double layer structure on a light transmitting insulating substrate. CONSTITUTION:Thin film fuses 13 made of at least one of polycrystalline Si, Al, Mo silicide, Ni-Cr alloy or Ti series alloy are formed via an insulating film 12 on a light transmitting insulating substrate 11. The film 12 is formed over the fuses 13. Thin film fuses 14 made of the same material as above is formed on the film 12. In the semiconductor device of this structure, a laser beam X is emitted from the opposite side of the substrate 11 to selectively fuse the fuses 14, and a laser beam Y is emitted from the side of the substrate 11, and the fuses 13 can be selectively fused.
JP56008536A 1981-01-22 1981-01-22 Semiconductor device Pending JPS57122565A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56008536A JPS57122565A (en) 1981-01-22 1981-01-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56008536A JPS57122565A (en) 1981-01-22 1981-01-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57122565A true JPS57122565A (en) 1982-07-30

Family

ID=11695867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56008536A Pending JPS57122565A (en) 1981-01-22 1981-01-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57122565A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0083211A2 (en) * 1981-12-28 1983-07-06 Fujitsu Limited Semiconductor device with fuse
JPS63222443A (en) * 1987-03-11 1988-09-16 Alps Electric Co Ltd Thin film transistor matrix array
US6040754A (en) * 1998-06-11 2000-03-21 Uchihashi Estec Co., Ltd. Thin type thermal fuse and manufacturing method thereof
US7477130B2 (en) 2005-01-28 2009-01-13 Littelfuse, Inc. Dual fuse link thin film fuse

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0083211A2 (en) * 1981-12-28 1983-07-06 Fujitsu Limited Semiconductor device with fuse
JPS63222443A (en) * 1987-03-11 1988-09-16 Alps Electric Co Ltd Thin film transistor matrix array
US6040754A (en) * 1998-06-11 2000-03-21 Uchihashi Estec Co., Ltd. Thin type thermal fuse and manufacturing method thereof
US7477130B2 (en) 2005-01-28 2009-01-13 Littelfuse, Inc. Dual fuse link thin film fuse

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