JPS56138921A - Method of formation for impurity introduction layer - Google Patents

Method of formation for impurity introduction layer

Info

Publication number
JPS56138921A
JPS56138921A JP4174780A JP4174780A JPS56138921A JP S56138921 A JPS56138921 A JP S56138921A JP 4174780 A JP4174780 A JP 4174780A JP 4174780 A JP4174780 A JP 4174780A JP S56138921 A JPS56138921 A JP S56138921A
Authority
JP
Japan
Prior art keywords
layer
impurity
impurity introduction
introduction layer
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4174780A
Other languages
Japanese (ja)
Inventor
Masanao Itoga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4174780A priority Critical patent/JPS56138921A/en
Publication of JPS56138921A publication Critical patent/JPS56138921A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation

Abstract

PURPOSE:To form the shallow impurity introduction layer having fully controlled impurity density of an accurate depth by a method wherein the impurity introduction layer is formed on the surface of the material to be processed by generating discharge in the container wherein the material containing impurities has been introduced. CONSTITUTION:The material to be processed 4, such as an Si substrate and the like, is placed on the lower electrode 1 of a vacuum container 3, the material containing the impurities such as PH3 and the like is introduced from a gas leading-in hole 5, a P is introduced on the surface of Si by generating a plasma discharge applying a high frequency from high-frequency oscillator 7, and the uniform layer of 50A or thereabout of the impurity diffused layer (namely, N<+>Si layer) having the controlled density is formed. As a result, the impurity introduced layer of an excellent controllability can be formed on a plurality of substrates simultaneously and this can be used also for a dry-etching device.
JP4174780A 1980-03-31 1980-03-31 Method of formation for impurity introduction layer Pending JPS56138921A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4174780A JPS56138921A (en) 1980-03-31 1980-03-31 Method of formation for impurity introduction layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4174780A JPS56138921A (en) 1980-03-31 1980-03-31 Method of formation for impurity introduction layer

Publications (1)

Publication Number Publication Date
JPS56138921A true JPS56138921A (en) 1981-10-29

Family

ID=12617008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4174780A Pending JPS56138921A (en) 1980-03-31 1980-03-31 Method of formation for impurity introduction layer

Country Status (1)

Country Link
JP (1) JPS56138921A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111324A (en) * 1981-12-25 1983-07-02 Hitachi Ltd Preparation of semiconductor device
JPS5976474A (en) * 1982-10-25 1984-05-01 Semiconductor Energy Lab Co Ltd Manufacture of insulated gate type field effect semiconductor device
JPS5976468A (en) * 1982-10-25 1984-05-01 Semiconductor Energy Lab Co Ltd Semiconductor device
JPS60216555A (en) * 1984-04-12 1985-10-30 Fuji Electric Corp Res & Dev Ltd Manufacture of semiconductor device
JPS6189670A (en) * 1984-10-08 1986-05-07 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62279626A (en) * 1986-05-27 1987-12-04 M Setetsuku Kk Impurity doping method for semiconductor substrate
JPS63299327A (en) * 1987-05-29 1988-12-06 Matsushita Electric Ind Co Ltd Plasma doping method
JPH08213333A (en) * 1995-12-18 1996-08-20 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111324A (en) * 1981-12-25 1983-07-02 Hitachi Ltd Preparation of semiconductor device
JPH0451971B2 (en) * 1981-12-25 1992-08-20 Hitachi Ltd
JPS5976474A (en) * 1982-10-25 1984-05-01 Semiconductor Energy Lab Co Ltd Manufacture of insulated gate type field effect semiconductor device
JPS5976468A (en) * 1982-10-25 1984-05-01 Semiconductor Energy Lab Co Ltd Semiconductor device
JPS60216555A (en) * 1984-04-12 1985-10-30 Fuji Electric Corp Res & Dev Ltd Manufacture of semiconductor device
JPS6189670A (en) * 1984-10-08 1986-05-07 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62279626A (en) * 1986-05-27 1987-12-04 M Setetsuku Kk Impurity doping method for semiconductor substrate
JPH0516656B2 (en) * 1986-05-27 1993-03-05 Emu Setetsuku Kk
JPS63299327A (en) * 1987-05-29 1988-12-06 Matsushita Electric Ind Co Ltd Plasma doping method
JPH08213333A (en) * 1995-12-18 1996-08-20 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

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