JPS58111324A - Preparation of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the p-n junction forming process cost by annealing immediately after ion implantation using the same apparatus. CONSTITUTION:A silicon substrate 41 is placed in plasma 42 including phosphorus ion in the density of 10<10>-10<11> pcs/cm<2> generated by microwave discharge, and then phosphorus ion is implanted to the substrate 41 by applying a negative voltage of 5-10kV for several seconds to the substrate 41 for the plasma. Thereafter, a discharge gas is changed to a gas not including the phosphorus ion and the same apllied voltage condition of 10kV is maintained for 10sec. At this time, since the positive ion of about 50mA is applied to the substrate 41 with an energy in accordance with an applied voltage, the substrate 41 is heated up to a high temperature near the melting point within several seconds. As a result, the ion-implanted layer at the surface of substrate 41 is perfectly annealed. The ion implantation and annealing can be realized continuously by the same apparatus and therefore cost reduction and increase of processing speed can also be attained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device by using an apparatus having a plasma generation source and performing annealing immediately after ion implantation.

In the conventional method of performing ion implantation and annealing simultaneously or sequentially, as shown in FIG. 1, the ion implantation section I and the annealing section are independent. Single K.

Putting both in the same vacuum was difficult because a device connected by continuous twins was used. Therefore, there is a limit to the simplification of the equipment, and if electron beam annealing is used in conjunction with 1%, it is impossible to transport the substrate 1 in a vacuum, so complexity in the equipment is unavoidable. There were many shortcomings. This indicates that there is a limit to the reduction in the cost of the pn junction formation process, for example. In Figure 1, IB is 2 mm above the ion.

AB is a laser or an electron beam.

An object of the present invention is to reduce the cost of the pn junction formation process, for example, by not performing annealing immediately after ion implantation using the same device.

The chip-on implantation method has become an important elemental technology in the semiconductor industry today, but the implantation equipment for semiconductor processing has the advantage of high purity of introduced impurities due to the mass separation method shown in Figure 2. On the other hand, since it is equipped with a mass separator, it has the disadvantage that the equipment cost and running cost are high.

On the other hand, for forming p-n junctions, the ninth third
A method that does not involve mass separation (non-mass separation method) is being considered, as shown in the figure. According to this method.

In addition to reducing equipment costs and running costs,
Since the path of the ion beam is shortened, the loss due to collision and scattering with the inner wall of the device, etc. is reduced, and the implantation current is increased, so that the implantation processing speed is increased.

However, conventional methods of annealing wafers subjected to ion implantation process JIl include exposing the wafer to the atmosphere after ion implantation and performing annealing in an electric furnace, or alternatively, using an ion implantation device and a laser beam, A method has been used in which ion implantation and annealing are performed continuously by connecting annealing devices. The former method involves batch processing and requires cleaning before annealing.]1 For example, there is a limit to the cost reduction of the pn junction formation process. In the latter case, since the ion implantation beam and the annealing beam generation source are separate, it is necessary to arrange them side by side and move the wafer in a vacuum, which limits the simplification of the Toshiba device.

Therefore, one feature of the present invention is that in a simple device having an ion generation source, annealing is performed immediately after ion implantation.

An embodiment of the present invention will be explained below with reference to FIG.

A silicon substrate 41 is placed in a plasma 42 containing phosphorus ions with a density of 1010 to 1011 ions/cm" generated by microwave discharge, and
A negative voltage of 10 kV is applied for several seconds to implant phosphorus ions into the substrate. Continue to change the discharge gas to a gas that does not contain phosphorus ions,
For example, switch to hydrogen.

The same applied potential state at 10 kV is maintained for 10 seconds.

At this time, 50mAl11 degree positive ions enter the substrate 41 with energy corresponding to the applied voltage.

The substrate 41 is heated to a high temperature close to its melting point within a few seconds. As a result, the ion implantation layer on the surface of the substrate 410 is completely annealed.

The impurity-introduced layer obtained by this method has excellent uniformity within the substrate plane, and the redistribution of phosphorus atoms is as small as αO1#m or less.
In addition, the bonding properties were good, and residual crystal defects were effectively inactivated by hydrogen.

This ion irradiation for annealing can be performed not only on the ion implantation surface but also on the back ff1K.

At this time, after ion implantation, the wafer was rotated.

It is sufficient to make the back surface facing the plasma source.Alternatively, during annealing, a positive voltage of 0.1 to 10 kV is applied to the substrate 41, and 0.1 to 5 electrons are incident on the substrate 41. A similar annealing effect can be obtained. In this case, in order to effectively apply a voltage between the plasma 42 and the substrate 41, it is necessary to supply approximately the same amount of electrons as the electrons incident on the substrate. For this purpose, an electron source 43 is provided. Also good.

Of course, even without providing a separate electron source, the area covered by the conductor on the inner surface of the plasma container 44 can be reduced to about 1 of the surface area of the substrate 1.
By setting the ratio to 00 times or more, the loss of electrons incident on the substrate becomes
A type that has little effect on the characteristics of the entire plasma,
It is possible to effectively apply voltage to the substrate.

Furthermore, the time required to perform ion implantation and annealing treatment on a 100 sq. diameter wafer is within 15 seconds.

That is, it failed when the processing speed was 240 sheets/hour or more.

In the conventional method, the ion implantation processing speed is 200 wafers/hour*, and the electric furnace annealing is 100 to 200 wafers/hour. By combining an ion implantation device and an electric furnace, a round plate wafer processing speed can be obtained, so tP'' means a low cost for the junction formation process.

In the present invention, the plasma generation method is not necessarily limited to microwave discharge, but plasma with uniform density can be easily generated over a wide area.

Dielectric breakdown does not occur easily when voltage of about kV is applied.
In this example, microwave discharge was used for the following reasons: plasma generation is easy in the low gas pressure range of o-"paiiiz, and since it is a non-polar discharge, a structure with less pollution can be created. There is.

Furthermore, the plasma can be used simply as an ion source;

It can also be regarded as an electron source, and may have a structure having a beam extraction electrode 45 as shown in a circle as shown in FIG.

According to the present invention, continuous processing of ion implantation and annealing can be performed using a single simple electric manufacturing unit.

Moreover, the processing speed is over 240 sheets/hour.

This is effective in terms of reducing equipment costs and increasing processing speed, which in turn is economical.

[Brief explanation of the drawing]

Fig. 1 shows a conventional junction forming device, Fig. 2 shows a mass separation type ion implantation device, Fig. 3 shows a non-mass separation type ion implantation device, and Fig. 4 shows a diagram used in the present invention. FIG. FIG. 5 is a diagram showing a bond forming apparatus equipped with an extraction electrode in FIG. 4. 1.41...Semiconductor substrate, 2...Ion source, 3...
- Mass outside 111r1.4... Implanting chamber, 42... Plasma, 43... Electron source, 44... Plasma container,
45...Output power Figure 5

Claims (1)

[Claims] 1. In an apparatus having a plasma generation source, first. Conductive impurities are introduced into a semiconductor substrate, etc. using a gas containing dont ions as a discharge gas, and then the substrate is directly irradiated with energy by showering the substrate with ions or electrons to anneal it. A method for manufacturing a featured semiconductor device.