JPS62279626A - Impurity doping method for semiconductor substrate - Google Patents

Abstract

PURPOSE:To prepare a shallow impurity region easily in a short time by a method wherein a voltage whose polarity is varied is impressed to generate plasma between a stage with a substrate disposed thereon and an opposite electrode. CONSTITUTION:An N-type single crystal substrate 5 of Si as a negative pole is set on a stage 2, and an opposite electrode 3 made of a P-type single crystal is disposed above the substrate. The stage 2 is heated up to 200-400 deg.C by a heater 4. A diluted gas of B2H6 having H2 as a base is sealed in a plasma generating apparatus 1, and a directcurrent voltage of 400-600 V is impressed between the stage 2 and the opposite electrode 3, so as to produce plasma discharge. Thereafter a polarity converter 7 is operated at every prescribed time to vary the polarity of the impressed voltage. By this method, a shallow P-type impurity region can be prepared easily in a short time.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an impurity doping method for doping a semiconductor substrate with an impurity using plasma.

[Conventional technology]

Low-temperature processing of semiconductors has been desired in conventional device manufacturing processes because it suppresses thermal metamorphosis, changes in impurity distribution, and changes in lifetime, but it has been particularly popular recently.
In the case of dimensional ICs, this technique is indispensable in order to avoid adverse effects on lower layer devices that have already been formed when manufacturing upper layer devices, and is becoming more sought after as semiconductor devices become smaller.

Currently, ion implantation is becoming the mainstream method for introducing impurities into semiconductor substrates instead of thermal diffusion, but especially in the case of boron, which is a light element, it is difficult to implant deeply and to form a shallow P region.

However, it is also possible to lower the energy to about 10 keV, but in this case the beam current will decrease and the processing time will become longer! : There are two problems that reduce productivity. Further, there have been serious problems with miniaturization in the depth direction of the substrate, such as the need for heat treatment at a relatively high temperature for activation of impurities after implantation and damage recovery.

[Problem that the invention seeks to solve]

As mentioned above, when introducing impurities into a semiconductor substrate, it is difficult to create a shallow P region in the case of boron, which is a light element, and the process takes a long time or requires high-temperature heat treatment, making it unsuitable for mass production. There were no various problems.

This invention was made to solve these problems, and is suitable for semiconductor substrates that can easily form shallow impurity regions, can be heated for a relatively short period of time, and do not require high-temperature heat treatment. A semiconductor single crystal group & is placed on a stage of impurities, and a voltage with changing polarity is applied between this stage and a counter electrode to generate plasma and introduce impurities by ion implantation. By reversing the polarity, the substrate is irradiated with energetic electrons and the energy is applied to the substrate lattice, thereby accelerating the diffusion of boron. By controlling this accelerating voltage, the expansion can be done to the desired depth.
f! 1. [Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

This embodiment shows the case where boron is diffused into an N-type substrate.

In the first factor, 1 is a parallel plate type plasma generator, 2 is its stage, 3 is a counter electrode, and 4 is a heater.

An N-type silicon single crystal substrate 5 is placed on top of the stay ') 2, which is used as a negative electrode, and a counter electrode 3 provided at the upper part 5Qrm is made of a P-type single crystal with a specific resistance of 0.050. Arrange the items that were given. Stage 2 is heated to 200 by heater 4.
Heat to ~400"C. 1 unit in plasma generator TL, H2 haze B*Ha 2000 ppm
diluent gas is sealed at a pressure of 2 to 4.5 Torr, and a DC voltage of 40 torr OV is applied between the stage 2 and the opposing polarization 3 to generate plasma discharge.

Figure 2 shows the spreading resistance of the diffusion layer when a cycle of applying a voltage so that the diode 2 side and therefore the N-type single crystal substrate 5 is negative, then reversing the polarity and carrying out relaxation injection for 10 minutes is carried out twice. As shown in , the diffusion depth was 01μ.

2. This polarity change is performed by appropriately selecting the cycle and the absolute values of the positive and negative voltages depending on the diffusion depth 1, as shown in FIG.

There was no change in the characteristics even after lamp annealing, and it became clear that impurities were sufficiently activated.Furthermore, even when measuring the tape level by DLTS, there were no lattice defects and levels due to heavy metals. I didn't see it either.

In addition, by using an alternating voltage of 5QH2 instead of this polarity reversal, the diffusion depth was 0.06 μm, which was shallower than that of the polarity reversal method, but substantially the same results were obtained.

Incidentally, the cathode fall in the plasma is several tens of volts, and the impact of positive ions caused by this has low energy, but the collision cross section is large, so surface roughness occurs only on the surface, but not all of it.

This deficiency is thought to be caused by movement of the substrate thickness, disorder of atomic arrangement, and pairs of atomic vacancies and interstitial atoms.

Next, the energetic boron ions repeatedly exchange positions with these atomic vacancies, and the interstitial atoms exchange positions with the atoms at one lattice point and diffuse respectively.

In this way, the Vac caused by the dots generated in the crystal
It is presumed that it spreads by an ancy mechanism and an interstitial mechanism.

However, since the incident energy of this diffusion is low, the energy given to the constituent lattice under the surface of the substrate is small, and the boron atoms replaced by the lattice become negative acceptor ions, so they are repelled by the external electric field and go inside. is difficult to spread.

Therefore, the polarity of the applied voltage is reversed when the surface layer is doped with boron at a high concentration to a certain extent.

As a result, the substrate is irradiated with energetic electrons, and by controlling this accelerating voltage, the energy possessed by the electrons is applied to the substrate lattice up to the desired diffusion depth, and furthermore, by reversal, the substrate side becomes the positive electrode. Therefore, the boron acceptor ions localized on the front surface of the substrate will be accelerated in diffusion due to the drift of this electric field.

In this way, diffusion is facilitated by the primordial reversal effect, so the applied voltage can be relatively low, which has the advantage of reducing stress on the mask material and the insulating film of the multilayer structure. Further, in this case, an annealing effect due to electron irradiation 1 is also considered.

The energy imparted to the grating by this wire does not change depending on the electrical and optical characteristics of the substrate material, etc.
In addition, since there is no interference effect, energy is not emitted only to a specific location, and uniformity of doping when viewed from a plane can be obtained.

In addition, since the activation is performed by the energy of incident electrons, a freezing phenomenon of high-grade impurities exceeding the metastable solid solubility limit occurs, and a high surface concentration is maintained without redistribution.

Ru.

Furthermore, since the critical displacement energy of incident electrons for Si atoms is as high as 125 keV, it can be seen that when the energy is low as in the method of this invention (lattice defects due to electrons do not occur at all).

This also applies to general plasma processes.
The problem is heavy metal contamination from the vessel walls, electrodes, etc.

In particular, in the doping method using plasma like the method of this invention, pe, Ni, which forms deep impurity levels,
Since these materials diffuse through an interstitial mechanism, their diffusion coefficients are significantly higher than those of boron, etc., so this is a problem that cannot be ignored.

For example, when using SO8 (stainless steel) i1f electrode, the substrate has 0,35 e
A deep level level of I/~0.55 e v was observed n
Lifetime also decreases.

This phenomenon is also seen in the case of SUS anodes and substrate cathodes, and the metal splash effect is particularly effective at the SO8 cathode when the polarity is reversed.

Therefore, in the embodiment of the present invention, this problem is solved by using a coffin crystal silicon Ti electrode containing a high concentration of the same element as the element to be doped in the opposing electrode 31 to prevent contamination.

It should be noted that the present invention is not limited to the above-described embodiments, and may have different configurations without changing the gist.

〔Effect of the invention〕

As described above, according to the present invention, there is provided a method for doping impurities into a semiconductor substrate, which makes it easy to form a shallow impurity region, can be carried out in a relatively short time, and does not require high-temperature heat treatment. I can do it.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of one embodiment of the present invention, FIG. 2 is a curve diagram showing the characteristics of the spreading resistance of the diffusion layer with respect to the depth l from the surface of the same embodiment, and FIG. FIG. 7 is a waveform diagram showing the voltage applied between the stage and the opposite pole in Example 2. Engineering...Plasma generator 2-Stage S...Counter electrode 4-Heater 5...N-type single crystal substrate
6...DC power supply 7...Polarity converter Applicant: M Setec Co., Ltd. Figure 2 Figure 3 Procedural amendment 1, Indication of the case Japanese Patent Application No. 123173/1982 2, Name of the invention Impurities on semiconductor substrates Doping method 3, relationship with the case of the person making the amendment Patent applicant M Setec Co., Ltd. 4, attorney 6 Contents of the amendment (1) The scope of the claims of the present application will be corrected as shown in the attached document. (2) Specification 4! : From the last line of page 3 to the 7th line of page 4, “
This invention... accelerates the invention. ” has been corrected as follows. ``The doping method of the present invention involves placing a semiconductor substrate on a stage of a plasma generator [stirring device] and applying a voltage of varying polarity between the stage and a counter electrode to generate plasma and introduce impurities. It is characterized by carrying out
By reversing the polarity of the voltage, the substrate is irradiated with energetic electrons, and the energy is applied to the substrate lattice, thereby promoting the diffusion of impurity atoms. ”
(3) “Interstialcy” on page 6, line 18.
Change the J part to “INTBR8TITIALOY J
I am corrected. 2. Scope of Claims +1+ A semiconductor substrate is placed on a stage of a plasma generation device, and a voltage of varying polarity is applied between the stage and a counter electrode to generate plasma and introduce impurities. A method for doping impurities into a semiconductor substrate. (2+ $) Doping of an impurity onto a semiconductor substrate according to claim 1, characterized in that the voltage changing with IL property is applied by changing the polarity of the DC voltage applied with the stage side being negative. (3) A method for doping a semiconductor substrate with an impurity substance according to claim 1, characterized in that the voltage whose polarity changes is applied by an alternating current ratio. (4) Opposing polarization 75) I. A method for doping impurities into a semiconductor substrate as described above, characterized in that a silicon electrode containing the same element as the element to be doped is used.

Claims (4)

[Claims] (1) A semiconductor single crystal substrate is placed on the stage of a plasma generator, and a voltage with changing polarity is applied between the stage and a counter electrode to generate plasma and introduce impurities by ion implantation. A method for doping impurities into a semiconductor substrate. (2) The method of doping impurities into a semiconductor substrate according to claim 1, wherein the voltage whose polarity changes is applied by changing the polarity of a DC voltage applied with the stage side being negative. (3) A method for doping impurities into a semiconductor substrate according to claim 1, wherein the voltage whose polarity changes is applied by an alternating voltage. (4) Claim 1, characterized in that a silicon electrode containing the same element as that doped in the counter electrode is used.
A method for doping impurities into a semiconductor substrate according to any one of items 1 to 3.