JPS5843899B2 - Method for forming transparent conductive film - Google Patents

Method for forming transparent conductive film

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Publication number
JPS5843899B2
JPS5843899B2 JP50091255A JP9125575A JPS5843899B2 JP S5843899 B2 JPS5843899 B2 JP S5843899B2 JP 50091255 A JP50091255 A JP 50091255A JP 9125575 A JP9125575 A JP 9125575A JP S5843899 B2 JPS5843899 B2 JP S5843899B2
Authority
JP
Japan
Prior art keywords
transparent conductive
conductive film
layer
in2o3
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50091255A
Other languages
Japanese (ja)
Other versions
JPS5215261A (en
Inventor
紘一 篠原
康博 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP50091255A priority Critical patent/JPS5843899B2/en
Publication of JPS5215261A publication Critical patent/JPS5215261A/en
Publication of JPS5843899B2 publication Critical patent/JPS5843899B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は透明導電膜の形成方法に関するものである。[Detailed description of the invention] The present invention relates to a method for forming a transparent conductive film.

近年、半導体工学の進歩にともなって、少なくとも一層
の半導体層を有する薄膜デバイスが開発され1次いで工
業化されていて、その汎用性は極めて大きいものである
In recent years, with the progress of semiconductor engineering, thin film devices having at least one semiconductor layer have been developed and are being industrialized, and their versatility is extremely large.

たとえば薄膜デバイスは近年著しい進歩をとげた液晶や
プラズマ等のディスプレイ装置に用いられている。
For example, thin film devices are used in display devices such as liquid crystal and plasma, which have made remarkable progress in recent years.

そして、薄膜デバイスにおける薄膜形成方法としては真
空蒸着法やスパッタリング法あるいは現在研究段階で次
第に重要視されつつあるイオンブレーティング法等があ
げられる。
Examples of methods for forming thin films in thin film devices include vacuum evaporation, sputtering, and ion blating, which is becoming increasingly important at the current research stage.

そして、透明導電膜の形成技術は、この薄膜応用の代表
例として知られているが、所望する抵抗値の薄膜を再現
性よく得ることができないという製法上の問題点がある
The technique of forming a transparent conductive film is known as a typical example of this thin film application, but there is a problem in the manufacturing method that a thin film having a desired resistance value cannot be obtained with good reproducibility.

たとえば、In203Sn02のある混合比のベレット
から公知の電子ビーム蒸着法(真空蒸着法の一つ)によ
って、 73D熱状態のガラス基板上に低抵抗の薄膜を
再現性よく得ることは次にあげる理由から極めて困難で
あった。
For example, a thin film with low resistance can be obtained with good reproducibility on a glass substrate heated to 73D by using a well-known electron beam evaporation method (one of the vacuum evaporation methods) from a pellet with a certain mixture ratio of In203Sn02 for the following reasons. It was extremely difficult.

すなわち、ペレット内のベース物質であるI n 20
3と原子価側脚のためのドーピング物質であるS n
02との混合が均一に分散しにくい点や。
That is, the base material in the pellet, I n 20
3 and the doping material for the valence side leg S n
It is difficult to disperse uniformly when mixed with 02.

熱解離および蒸気圧の差等の諸原因が再現性を阻害して
いる理由としてあげられる。
Various causes such as thermal dissociation and differences in vapor pressure are cited as reasons for inhibiting reproducibility.

このことは他の方法すなわち、スパッタリング法や二元
蒸着法についても同様である。
This also applies to other methods, such as sputtering and binary evaporation.

換言すれば公知の手段はいずれも再現性が劣るものであ
る。
In other words, all known means have poor reproducibility.

本発明はか\る事情に鑑みて、IOKΩ/Sg以下の高
抵抗の透明電導膜層を形成し、この透明電導膜層を通I
n熱した状態でこの透明電導膜層にイオンを注入するこ
とにより、イオン注入時に発生する欠陥量すなわち格子
欠陥の発生を抑制しつつ低抵抗化を促進し、再現性がよ
くしかも抵抗値の制(財)性の良好な透明電導膜の形成
方法を提供しようとするものである。
In view of these circumstances, the present invention forms a transparent conductive film layer with a high resistance of IOKΩ/Sg or less, and passes through this transparent conductive film layer.
By implanting ions into this transparent conductive film layer in a heated state, it is possible to suppress the amount of defects that occur during ion implantation, that is, the generation of lattice defects, and promote lower resistance, resulting in good reproducibility and control of the resistance value. The present invention aims to provide a method for forming a transparent conductive film with good properties.

以下1本発明の実施例を図面にしたがって説明すると、
まず第1図に示すガラス基板1上に透明電導膜層たとえ
ばI n203層2を形成する。
Below, one embodiment of the present invention will be described with reference to the drawings.
First, a transparent conductive film layer, for example, an In203 layer 2, is formed on a glass substrate 1 shown in FIG.

このI n 20 s層2の形成は公知の手段すなわち
スパッタリング法もしくは電子ビーム蒸着法等によって
行なわれるものである。
This In 20 s layer 2 is formed by known means, such as sputtering or electron beam evaporation.

そして前記In2O3層2は公知の技術によって膜厚を
200OAに0表面抵抗を比較的高抵抗であるIKΩ/
S9〜IOKΩ/SgたとえばIKΩ/Sgに制御する
The In2O3 layer 2 has a film thickness of 200OA and a relatively high resistance of IKΩ/0 and a surface resistance of 0.
S9 to IOKΩ/Sg is controlled to, for example, IKΩ/Sg.

かXるオーダーの抵抗値の制御性は表面抵抗が比較的高
抵抗であるので極めて良好である。
The controllability of the resistance value on the order of X is extremely good because the surface resistance is relatively high.

次に、In2O3層2の主面両端にAu、Ta、 AI
等の金属電極層3を公知手段によって形成し、該電極層
3を77[l熱醒源4に接続する。
Next, Au, Ta, and AI are deposited on both ends of the main surface of the In2O3 layer 2.
A metal electrode layer 3 such as the above is formed by known means, and the electrode layer 3 is connected to a 77 [l thermal aeration source 4.

そして、電極層3の層間距離をA 1cmJ 、ガラス
基板1の幅を5AJmlとした場合、In2O3層2の
両端に交流もしくは直流zoovの電圧を印加してI
n 203層2を直接通電加熱する。
Then, when the interlayer distance of the electrode layer 3 is A 1 cmJ and the width of the glass substrate 1 is 5 AJml, an alternating current or direct current zoov voltage is applied to both ends of the In2O3 layer 2.
n 203 Layer 2 is directly heated with electricity.

In2O3層2が温度平衡に達するのはイオンを照射す
るためのガラス基板1の保持構成や該基板1の厚み等l
こよって多少異なるが、熱絶縁の設計から考慮して5〜
IO分間で温度平衡に達するものである。
The In2O3 layer 2 reaches temperature equilibrium depending on the holding structure of the glass substrate 1 for ion irradiation, the thickness of the substrate 1, etc.
This will vary slightly, but considering the design of thermal insulation, 5~
Temperature equilibrium is reached in IO minutes.

この実施例では5分後に200°Cに達した。In this example, the temperature reached 200°C after 5 minutes.

In2O3層2を上記の高温に保持した状態で、すなわ
ちアニーリングした状態下においてイオンビーム5を該
In2O3層2に照射する。
The In2O3 layer 2 is irradiated with the ion beam 5 while the In2O3 layer 2 is held at the above-mentioned high temperature, that is, in an annealed state.

このイオンビーム5としてはSnイオンが用いられ、1
0−5〜IO−6m7MHgの真空中で行なわれる。
Sn ions are used as this ion beam 5, and 1
It is carried out in a vacuum of 0-5 to IO-6 m7MHg.

このSnイオンの照射は、金属を蒸気化してプラズマを
形成し、このプラズマからSnMオンを引き出す手段で
もよく、また5nC14の高周波プラスマイオン源を用
いる手段でもよい。
This Sn ion irradiation may be performed by vaporizing the metal to form a plasma and extracting SnM ion from this plasma, or by using a 5nC14 high frequency plasma ion source.

さらにイオン注入のための卯速系0分析系、減速系およ
び走査系等は公知手段によるものである。
Furthermore, the zero velocity analysis system, deceleration system, scanning system, etc. for ion implantation are based on known means.

このようにして、In2O3層2にSn+イオンを10
15〜10161on/cn!L注入することによって
I n 203をベースにし且つ10〜]OOΩ/Sg
の低抵抗の表面抵抗値を有する透明電導膜を再現性よく
形成することができた。
In this way, 10 Sn+ ions were added to the In2O3 layer 2.
15~10161on/cn! Based on I n 203 and 10~]OOΩ/Sg by L injection
It was possible to form a transparent conductive film with good reproducibility and a surface resistance value as low as .

ここで、Sn+イオンのエネルギは5KeV程度で充分
であるが、該エネルギは注入層すなわちI n 203
層2の膜厚と、注入層内に必要な分布とで決定するもの
である。
Here, it is sufficient for the energy of Sn+ ions to be about 5 KeV, but this energy is
It is determined by the thickness of layer 2 and the required distribution within the injection layer.

なお、定電圧電源を用いて加熱を行なうと、イオンの注
入に追従して抵抗値が下がり1発熱量が変化するので、
注入層に定温制御を施すためにスロープ制卸が行なわれ
る。
Note that when heating is performed using a constant voltage power supply, the resistance value decreases and the amount of heat generated per unit changes as the ions are implanted.
Slope control is performed to provide constant temperature control to the injection layer.

そして、このスロープ制御のために注入層の温度をフィ
ードバックさせて制御信号を得る方法が施されるが、必
ずしも、この方法による必要はない。
In order to control the slope, a method is used to obtain a control signal by feeding back the temperature of the injection layer, but this method is not always necessary.

また上記の様な定温制御を行なわずに一定電圧を印加し
て、イオン注入によるIn2O3層2の抵抗値の低下に
ともなうIn2O3層2の昇温状態下において、形成し
てもよく、この場合においても再現性の良好な透明電導
膜を得ることができるものである。
Alternatively, it may be formed by applying a constant voltage without performing constant temperature control as described above, and under a state where the temperature of the In2O3 layer 2 increases as the resistance value of the In2O3 layer 2 decreases due to ion implantation. Also, a transparent conductive film with good reproducibility can be obtained.

上記の実施例において、所望する抵抗値の制(財)性が
極めて良好な透明電導膜を得ることができた。
In the above examples, it was possible to obtain a transparent conductive film having extremely good controllability of the desired resistance value.

このことはイオン注入の制御性に起因するものである。This is due to the controllability of ion implantation.

すなわち注入イオンは荷晟粒子であり、その電気量によ
って高精度に測定側(財)することができるからである
That is, the implanted ions are charged particles and can be measured with high precision due to their electrical quantity.

しかも、注入層を高温状態に保って注入するので後工程
としての熱処理を省略することも可能である。
Moreover, since the injection layer is kept at a high temperature during injection, it is possible to omit heat treatment as a post-process.

第2図は他の実施例を示すものである。FIG. 2 shows another embodiment.

すなわち厚さ2皿のガラス基板6上にI OOAのAu
電極層7を形成し、該電極層7上に400OA のZ
n3層8を形成した後に、このZn3層8上に透明電導
膜層であるIn2O3層9を形成して、該In2O3層
9の主面両端にAu、 Ta、 A、I等の金属電極層
10を形成し、さらに該電極層10を7JD熱電源11
に接続する。
In other words, IOOA of Au is deposited on a glass substrate 6 with a thickness of two plates.
An electrode layer 7 is formed, and a Z of 400OA is formed on the electrode layer 7.
After forming the n3 layer 8, an In2O3 layer 9, which is a transparent conductive film layer, is formed on the Zn3 layer 8, and metal electrode layers 10 of Au, Ta, A, I, etc. are formed on both ends of the main surface of the In2O3 layer 9. , and further the electrode layer 10 is connected to a 7JD thermal power source 11.
Connect to.

而して、In2O3層9を上述の如く高温加熱した状態
の下において、Mnイオン12をエネルギ10〜20K
ev、注入量1014〜I 016ion/iで注入す
ることによって、ZnSの発光中心を作ることができる
と同時にIn2O3の透明度および電気伝導度を向上さ
せることができ、実用上極めて優れた効果を有するもの
である。
Then, while the In2O3 layer 9 is heated to a high temperature as described above, the Mn ions 12 are heated to an energy of 10 to 20K.
ev, by implanting at an injection amount of 1014 to 1016 ion/i, it is possible to create a luminescent center of ZnS and at the same time improve the transparency and electrical conductivity of In2O3, which has extremely excellent practical effects. It is.

なお、上記の各実施例の他に物質層と基板との組合せや
パターン注入等の組合せにより各種用途に適応した薄膜
を形成することができ、その汎用性は極めて大きい。
In addition to the above-mentioned embodiments, thin films suitable for various uses can be formed by combining material layers and substrates, pattern implantation, etc., and are extremely versatile.

また、イオン注入によって半導体層の抵抗値を高める組
合せも可能である。
Further, a combination of increasing the resistance value of the semiconductor layer by ion implantation is also possible.

さらに、基板としてはSi、Ge等の半導体およびGa
AS、GaP@;の金属間化合物半導体や高分子成形物
あるいはフィルム等のいずれについても適用でき、同様
の効果を得ることができるものである。
Furthermore, the substrate may include semiconductors such as Si and Ge, and Ga.
It can be applied to any of intermetallic compound semiconductors such as AS and GaP@;, polymer molded products, films, etc., and similar effects can be obtained.

本発明は以上詳述したように再現性がよく、かつ抵抗値
の制御性すなわち透明電導膜層中のドーパント不純物の
濃度の制(財)性がよい透明導電膜の形成方法を提供で
き、さらにまた、その良い制御□□性の保持に高度の技
術が不要であって、工場で容易に使える透明導電膜の形
成方法を提供することができた。
As detailed above, the present invention can provide a method for forming a transparent conductive film with good reproducibility and good controllability of resistance value, that is, good controllability of the concentration of dopant impurities in the transparent conductive film layer. In addition, it was possible to provide a method for forming a transparent conductive film that does not require sophisticated technology to maintain good controllability and can be easily used in a factory.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本発明の詳細な説明するための薄
膜デバイスの断同図である。 1.6は基板、2,9は半導体、5.12はイオン。
FIGS. 1 and 2 are cross-sectional views of a thin film device for explaining the present invention in detail. 1.6 is a substrate, 2 and 9 are semiconductors, and 5.12 is an ion.

Claims (1)

【特許請求の範囲】[Claims] 1 10に078g以下の高抵抗の透明電導膜層を形成
し、この透明電導膜層を通電り1熱した状態でこの透明
電導膜層にイオンを注入し、前記透明電導膜層の低抵抗
化を促進する透明電導膜の形成方法。
1 A transparent conductive film layer with a high resistance of 078 g or less is formed on 10, and ions are implanted into the transparent conductive film layer while the transparent conductive film layer is heated for 1 time to reduce the resistance of the transparent conductive film layer. A method for forming a transparent conductive film that promotes
JP50091255A 1975-07-26 1975-07-26 Method for forming transparent conductive film Expired JPS5843899B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50091255A JPS5843899B2 (en) 1975-07-26 1975-07-26 Method for forming transparent conductive film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50091255A JPS5843899B2 (en) 1975-07-26 1975-07-26 Method for forming transparent conductive film

Publications (2)

Publication Number Publication Date
JPS5215261A JPS5215261A (en) 1977-02-04
JPS5843899B2 true JPS5843899B2 (en) 1983-09-29

Family

ID=14021306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50091255A Expired JPS5843899B2 (en) 1975-07-26 1975-07-26 Method for forming transparent conductive film

Country Status (1)

Country Link
JP (1) JPS5843899B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835070A (en) * 1981-08-27 1983-03-01 Kawasaki Heavy Ind Ltd Locking method for welding wire in arc welding
JPS6313878Y2 (en) * 1984-12-11 1988-04-19
JPS61137636A (en) * 1984-12-11 1986-06-25 Itaya Seisakusho:Kk Apparatus for manufacturing torsional spring

Also Published As

Publication number Publication date
JPS5215261A (en) 1977-02-04

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