JPS56108245A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56108245A JPS56108245A JP1037180A JP1037180A JPS56108245A JP S56108245 A JPS56108245 A JP S56108245A JP 1037180 A JP1037180 A JP 1037180A JP 1037180 A JP1037180 A JP 1037180A JP S56108245 A JPS56108245 A JP S56108245A
- Authority
- JP
- Japan
- Prior art keywords
- bump electrode
- layer
- wiring
- metal layer
- foundation metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To improve wiring efficiency by making the foundation metal layer whose one end is brought into contact with one given wiring layer extend over the insulating layer and providing a bump electrode on the other end. CONSTITUTION:One end of the foundation metal layer 4 is brought into contact with a given wiring layer 3a in an electrode window 6 and the other end is made to extend over to the position of a bump electrode 5. By said constitution, another wiring layer 3b insulated from the foundation metal layer 4 by an insulating layer 2' can be provided under the bump electrode 5. Accordingly, wiring efficiency can be improved without restrictions on design due to the bump electrode 5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1037180A JPS56108245A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1037180A JPS56108245A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56108245A true JPS56108245A (en) | 1981-08-27 |
Family
ID=11748287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1037180A Pending JPS56108245A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56108245A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114358A (en) * | 1980-02-15 | 1981-09-08 | Hitachi Ltd | Semiconductor device and manufacture |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52152165A (en) * | 1976-06-14 | 1977-12-17 | Hitachi Ltd | Formation of solder bump electrode |
-
1980
- 1980-01-31 JP JP1037180A patent/JPS56108245A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52152165A (en) * | 1976-06-14 | 1977-12-17 | Hitachi Ltd | Formation of solder bump electrode |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114358A (en) * | 1980-02-15 | 1981-09-08 | Hitachi Ltd | Semiconductor device and manufacture |
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