JPS56101761A - Airtight package for integrated circuit - Google Patents

Airtight package for integrated circuit

Info

Publication number
JPS56101761A
JPS56101761A JP436180A JP436180A JPS56101761A JP S56101761 A JPS56101761 A JP S56101761A JP 436180 A JP436180 A JP 436180A JP 436180 A JP436180 A JP 436180A JP S56101761 A JPS56101761 A JP S56101761A
Authority
JP
Japan
Prior art keywords
plating
base
conducted
gold
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP436180A
Other languages
Japanese (ja)
Other versions
JPS6122864B2 (en
Inventor
Tetsushi Ishida
Seizo Akasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP436180A priority Critical patent/JPS56101761A/en
Publication of JPS56101761A publication Critical patent/JPS56101761A/en
Publication of JPS6122864B2 publication Critical patent/JPS6122864B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/045Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads having an insulating passage through the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Casings For Electric Apparatus (AREA)

Abstract

PURPOSE:To enable to use a laser welding machine even for a package having a complicated shape by gold plating a part to be welded to the semiconductor of a base and plating with nongloss on the part to be welded to the can member of the base and the outer periphery in the vicinity of the part. CONSTITUTION:A lower plating layer is formed on the base material 4, and the gold is plated thereon. The can 10 is formed by plating nickel on a material such as kovar, and nonglossy plating is conducted without gold plating on the part superposed with the base 1 and the outer periphery 11 of the base. Since the nonglossy plating is conducted in this manner, even the package having complicated shape can not almost reflect the laser light, but can efficiently absorb it. Accordingly, hermetic seal can be conducted by using the laser welding machine, and welding locus can be controlled.
JP436180A 1980-01-18 1980-01-18 Airtight package for integrated circuit Granted JPS56101761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP436180A JPS56101761A (en) 1980-01-18 1980-01-18 Airtight package for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP436180A JPS56101761A (en) 1980-01-18 1980-01-18 Airtight package for integrated circuit

Publications (2)

Publication Number Publication Date
JPS56101761A true JPS56101761A (en) 1981-08-14
JPS6122864B2 JPS6122864B2 (en) 1986-06-03

Family

ID=11582231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP436180A Granted JPS56101761A (en) 1980-01-18 1980-01-18 Airtight package for integrated circuit

Country Status (1)

Country Link
JP (1) JPS56101761A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989003123A1 (en) * 1987-09-25 1989-04-06 Aegis, Inc. Microcircuit package with corrosion resistant pins and methof of making
US5093282A (en) * 1988-04-13 1992-03-03 Kabushiki Kaisha Toshiba Method of making a semiconductor device having lead pins and a metal shell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989003123A1 (en) * 1987-09-25 1989-04-06 Aegis, Inc. Microcircuit package with corrosion resistant pins and methof of making
US5093282A (en) * 1988-04-13 1992-03-03 Kabushiki Kaisha Toshiba Method of making a semiconductor device having lead pins and a metal shell

Also Published As

Publication number Publication date
JPS6122864B2 (en) 1986-06-03

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