JPS56101761A - Airtight package for integrated circuit - Google Patents
Airtight package for integrated circuitInfo
- Publication number
- JPS56101761A JPS56101761A JP436180A JP436180A JPS56101761A JP S56101761 A JPS56101761 A JP S56101761A JP 436180 A JP436180 A JP 436180A JP 436180 A JP436180 A JP 436180A JP S56101761 A JPS56101761 A JP S56101761A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- base
- conducted
- gold
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/045—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads having an insulating passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Optical Couplings Of Light Guides (AREA)
- Casings For Electric Apparatus (AREA)
Abstract
PURPOSE:To enable to use a laser welding machine even for a package having a complicated shape by gold plating a part to be welded to the semiconductor of a base and plating with nongloss on the part to be welded to the can member of the base and the outer periphery in the vicinity of the part. CONSTITUTION:A lower plating layer is formed on the base material 4, and the gold is plated thereon. The can 10 is formed by plating nickel on a material such as kovar, and nonglossy plating is conducted without gold plating on the part superposed with the base 1 and the outer periphery 11 of the base. Since the nonglossy plating is conducted in this manner, even the package having complicated shape can not almost reflect the laser light, but can efficiently absorb it. Accordingly, hermetic seal can be conducted by using the laser welding machine, and welding locus can be controlled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP436180A JPS56101761A (en) | 1980-01-18 | 1980-01-18 | Airtight package for integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP436180A JPS56101761A (en) | 1980-01-18 | 1980-01-18 | Airtight package for integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56101761A true JPS56101761A (en) | 1981-08-14 |
JPS6122864B2 JPS6122864B2 (en) | 1986-06-03 |
Family
ID=11582231
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP436180A Granted JPS56101761A (en) | 1980-01-18 | 1980-01-18 | Airtight package for integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56101761A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1989003123A1 (en) * | 1987-09-25 | 1989-04-06 | Aegis, Inc. | Microcircuit package with corrosion resistant pins and methof of making |
US5093282A (en) * | 1988-04-13 | 1992-03-03 | Kabushiki Kaisha Toshiba | Method of making a semiconductor device having lead pins and a metal shell |
-
1980
- 1980-01-18 JP JP436180A patent/JPS56101761A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1989003123A1 (en) * | 1987-09-25 | 1989-04-06 | Aegis, Inc. | Microcircuit package with corrosion resistant pins and methof of making |
US5093282A (en) * | 1988-04-13 | 1992-03-03 | Kabushiki Kaisha Toshiba | Method of making a semiconductor device having lead pins and a metal shell |
Also Published As
Publication number | Publication date |
---|---|
JPS6122864B2 (en) | 1986-06-03 |
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