JPS5558539A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5558539A
JPS5558539A JP13067578A JP13067578A JPS5558539A JP S5558539 A JPS5558539 A JP S5558539A JP 13067578 A JP13067578 A JP 13067578A JP 13067578 A JP13067578 A JP 13067578A JP S5558539 A JPS5558539 A JP S5558539A
Authority
JP
Japan
Prior art keywords
tray
pellets
solder
pellet
furnace
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13067578A
Other languages
Japanese (ja)
Inventor
Kuniaki Morimoto
Yoshihiko Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13067578A priority Critical patent/JPS5558539A/en
Publication of JPS5558539A publication Critical patent/JPS5558539A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE: To make soldering uniform and improve operational efficiency, by placing on a tray on which semiconductor pellets are arranged another tray having small holes corresponding to the pellets, and supplying melted solder on the surface of the pellets from the small holes in a furnace.
CONSTITUTION: Each pellet 1, with its gold-plated back side up, is placed in each square depression 2, slightly larger than pellet 1, provided on tray 3. On tray 3 is place tray 5, which has many holes 6 corresponding to the positions of the pellets. Each hole 6 contains small solid solder piece 4. It is conical and has opening 7 on its bottom. The positions of 2 and 6 are fitted, and then this structure is placed in a hydrogen furnace. Small solder piece 4 melts and drops on pallet 1. Subsequently, the structure is taken out from the furnace. The solder solidifies, and solder layer 8 is formed on the gold-plated layer on the back of pellet 1.
COPYRIGHT: (C)1980,JPO&Japio
JP13067578A 1978-10-24 1978-10-24 Manufacture of semiconductor device Pending JPS5558539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13067578A JPS5558539A (en) 1978-10-24 1978-10-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13067578A JPS5558539A (en) 1978-10-24 1978-10-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5558539A true JPS5558539A (en) 1980-05-01

Family

ID=15039919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13067578A Pending JPS5558539A (en) 1978-10-24 1978-10-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5558539A (en)

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