JPS5556635A - Preparation of surface top coat in semiconductor device - Google Patents
Preparation of surface top coat in semiconductor deviceInfo
- Publication number
- JPS5556635A JPS5556635A JP13017978A JP13017978A JPS5556635A JP S5556635 A JPS5556635 A JP S5556635A JP 13017978 A JP13017978 A JP 13017978A JP 13017978 A JP13017978 A JP 13017978A JP S5556635 A JPS5556635 A JP S5556635A
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- sio
- injection
- whole surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
PURPOSE: To improve the characteristics of a semiconductor device, by decreasing the tension stress of a Si3N4 film by injecting inert ions only to the Si3N4 film between the laminating films of SiO2 and Si3N4 films grown on a semiconductor substrate.
CONSTITUTION: The whole surface of a Si substrate 1 is coated with a SiO2 film 2, a window 3 is opened in a fixed region and a P+-type region 4 is diffusion-formed to the window. A SiO2 film 5 and a Si3N4 film 6 are laminated on the whole surface and grown by means of a CVD method, and a window hole 7 is bored letting it correspond to the region 4. An Al electrode 8 is evaporated contacting it with the region 4, and inert ions, such as Ar+, etc. are injected onto the whole surface. A peak of injection is produced in a region slightly entering from a surface of the film 6 and a tail is not reached to the film 5 by selecting the energy of injection and the quantity of injection at that time. Thus, the minuteness of the film 6 decreases, tension stress lessens distortion stress reduces and the currents of PN junction in the opposite direction diminish.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13017978A JPS6052580B2 (en) | 1978-10-20 | 1978-10-20 | Manufacturing method for surface protective film in semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13017978A JPS6052580B2 (en) | 1978-10-20 | 1978-10-20 | Manufacturing method for surface protective film in semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5556635A true JPS5556635A (en) | 1980-04-25 |
| JPS6052580B2 JPS6052580B2 (en) | 1985-11-20 |
Family
ID=15027933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13017978A Expired JPS6052580B2 (en) | 1978-10-20 | 1978-10-20 | Manufacturing method for surface protective film in semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6052580B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02222538A (en) * | 1989-02-23 | 1990-09-05 | Nec Corp | Formation of cover film for al wiring |
| US5010024A (en) * | 1987-03-04 | 1991-04-23 | Advanced Micro Devices, Inc. | Passivation for integrated circuit structures |
| US6146972A (en) * | 1997-06-11 | 2000-11-14 | Nec Corporation | Method for fabricating semiconductor device |
| WO2002047170A1 (en) * | 2000-12-08 | 2002-06-13 | Hitachi, Ltd. | Semiconductor device |
| JP2010503212A (en) * | 2006-09-01 | 2010-01-28 | イーストマン コダック カンパニー | Injection region of shallow trench isolation corner |
-
1978
- 1978-10-20 JP JP13017978A patent/JPS6052580B2/en not_active Expired
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5010024A (en) * | 1987-03-04 | 1991-04-23 | Advanced Micro Devices, Inc. | Passivation for integrated circuit structures |
| JPH02222538A (en) * | 1989-02-23 | 1990-09-05 | Nec Corp | Formation of cover film for al wiring |
| US6146972A (en) * | 1997-06-11 | 2000-11-14 | Nec Corporation | Method for fabricating semiconductor device |
| WO2002047170A1 (en) * | 2000-12-08 | 2002-06-13 | Hitachi, Ltd. | Semiconductor device |
| JP2010503212A (en) * | 2006-09-01 | 2010-01-28 | イーストマン コダック カンパニー | Injection region of shallow trench isolation corner |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6052580B2 (en) | 1985-11-20 |
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