JPS559489A - Method of making semiconductor device - Google Patents

Method of making semiconductor device

Info

Publication number
JPS559489A
JPS559489A JP8337778A JP8337778A JPS559489A JP S559489 A JPS559489 A JP S559489A JP 8337778 A JP8337778 A JP 8337778A JP 8337778 A JP8337778 A JP 8337778A JP S559489 A JPS559489 A JP S559489A
Authority
JP
Japan
Prior art keywords
film
coated
sio
substrate
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8337778A
Other languages
Japanese (ja)
Inventor
Kenzo Hatada
Riichi Kozono
Kosei Kajiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8337778A priority Critical patent/JPS559489A/en
Publication of JPS559489A publication Critical patent/JPS559489A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To prevent disappearance of aluminium wiring, decrease in contact resistance and lowering of strength by covering the back of a p-type Si substrate so as to avoid a cell action, upon forming an opening in the SiO2 film made by a CVD process by etching.
CONSTITUTION: On a p-type Si substrate 11 having a n-type region 12 is coated a SiO2 film 13, in the film on the region 12 is opened a hole, and the Al film 14 connected to an outer terminal is formed over the film 13. Then, in order to protect the film 14, the SiO2 film 15 is grown on the entire surface by a CVD process, a predetermined region is coated with a photosensitive resin film 16, and the hole 17 for an electrode and is opened in the film 15. In such a case, the back of the substrate 11 is first coated with an insulating film 18, then the coated substrates 11 are dipped by one into the H3PO4 based etching solutions 21 and 21' within the corresponding baths I and II connected each other through an opening 22. In this manner, a cell action and therefore the weight loss of the film do not occur due to the coated insulating film 18.
COPYRIGHT: (C)1980,JPO&Japio
JP8337778A 1978-07-07 1978-07-07 Method of making semiconductor device Pending JPS559489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8337778A JPS559489A (en) 1978-07-07 1978-07-07 Method of making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8337778A JPS559489A (en) 1978-07-07 1978-07-07 Method of making semiconductor device

Publications (1)

Publication Number Publication Date
JPS559489A true JPS559489A (en) 1980-01-23

Family

ID=13800717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8337778A Pending JPS559489A (en) 1978-07-07 1978-07-07 Method of making semiconductor device

Country Status (1)

Country Link
JP (1) JPS559489A (en)

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