JPS55141738A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55141738A
JPS55141738A JP4924279A JP4924279A JPS55141738A JP S55141738 A JPS55141738 A JP S55141738A JP 4924279 A JP4924279 A JP 4924279A JP 4924279 A JP4924279 A JP 4924279A JP S55141738 A JPS55141738 A JP S55141738A
Authority
JP
Japan
Prior art keywords
layer
upper layer
psg
containing phosphorus
sio2 film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4924279A
Other languages
Japanese (ja)
Inventor
Tetsuo Fujii
Shigeo Kanazawa
Toru Nohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP4924279A priority Critical patent/JPS55141738A/en
Publication of JPS55141738A publication Critical patent/JPS55141738A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the breakage of a wiring layer and short circuit at crossing portions between the multi-layers by softening and fluidifying the upper layer of an interlayer insulating film at the temperature lower than that of the lower layer, forming said layer at a faster etching speed, and smoothing the surface of the element. CONSTITUTION:A lower layer 8 comprising CVD SiO2 film (PSG) containing phosphorus of low-concentration, e.g., 0-3wt%, is formed on the surface of an element. Then, an upper layer 9 comprising CVD SiO2 film (PSG) containing phosphorus of 8-12wt% is formed. The upper layer 9 is softened by heat treatment and fluidified, thereby a covering state with a gentle slope can be obtained.
JP4924279A 1979-04-20 1979-04-20 Semiconductor device Pending JPS55141738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4924279A JPS55141738A (en) 1979-04-20 1979-04-20 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4924279A JPS55141738A (en) 1979-04-20 1979-04-20 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS55141738A true JPS55141738A (en) 1980-11-05

Family

ID=12825397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4924279A Pending JPS55141738A (en) 1979-04-20 1979-04-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55141738A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6365647A (en) * 1986-09-05 1988-03-24 Nec Corp Manufacture of semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6365647A (en) * 1986-09-05 1988-03-24 Nec Corp Manufacture of semiconductor integrated circuit device

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