JPS5512766A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method

Info

Publication number
JPS5512766A
JPS5512766A JP8578778A JP8578778A JPS5512766A JP S5512766 A JPS5512766 A JP S5512766A JP 8578778 A JP8578778 A JP 8578778A JP 8578778 A JP8578778 A JP 8578778A JP S5512766 A JPS5512766 A JP S5512766A
Authority
JP
Japan
Prior art keywords
formation
silicon
dispersion layer
thin film
contact hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8578778A
Other languages
Japanese (ja)
Other versions
JPS5933252B2 (en
Inventor
Tsutomu Yoshihara
Masahiko Yasuoka
Masahiro Hatanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8578778A priority Critical patent/JPS5933252B2/en
Publication of JPS5512766A publication Critical patent/JPS5512766A/en
Publication of JPS5933252B2 publication Critical patent/JPS5933252B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To improve electrical connection between a base plate and an ohmic electrode by opening a contact hole after completion of formation of a non-dope multi-crystal silicon thin film on a silicon dispersion layer.
CONSTITUTION: After completion of formation of a silicon dispersion layer 3, formation of a non-dope multi-crystal silicon thin film 7 is started immediately. A thick silicon oxide film 4 is formed, and a contact hole 5 is opened to be used as an electrode take-out hole. When boring the contact hole 5, etching liquid is not brougt in contact directly with a silicon dispersion layer 3 and a silicon oxide film 2 because of presence of the multi-crystal silicon thin film 7. And therefore, it is possible to prevent formation of a stain film on the surface of the silicon dispersion layer 3. An aluminum soldered layer is formed, and aluminum wirings 6 and 6' are formed by photographic etching.
COPYRIGHT: (C)1980,JPO&Japio
JP8578778A 1978-07-13 1978-07-13 Manufacturing method of semiconductor device Expired JPS5933252B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8578778A JPS5933252B2 (en) 1978-07-13 1978-07-13 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8578778A JPS5933252B2 (en) 1978-07-13 1978-07-13 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5512766A true JPS5512766A (en) 1980-01-29
JPS5933252B2 JPS5933252B2 (en) 1984-08-14

Family

ID=13868589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8578778A Expired JPS5933252B2 (en) 1978-07-13 1978-07-13 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5933252B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517225A (en) * 1983-05-02 1985-05-14 Signetics Corporation Method for manufacturing an electrical interconnection by selective tungsten deposition
US4612257A (en) * 1983-05-02 1986-09-16 Signetics Corporation Electrical interconnection for semiconductor integrated circuits
WO2009022982A1 (en) * 2007-08-10 2009-02-19 Agency For Science, Technology And Research Nano-interconnects for atomic and molecular scale circuits

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517225A (en) * 1983-05-02 1985-05-14 Signetics Corporation Method for manufacturing an electrical interconnection by selective tungsten deposition
US4612257A (en) * 1983-05-02 1986-09-16 Signetics Corporation Electrical interconnection for semiconductor integrated circuits
WO2009022982A1 (en) * 2007-08-10 2009-02-19 Agency For Science, Technology And Research Nano-interconnects for atomic and molecular scale circuits
US8420530B2 (en) 2007-08-10 2013-04-16 Agency For Science, Technology And Research Nano-interconnects for atomic and molecular scale circuits

Also Published As

Publication number Publication date
JPS5933252B2 (en) 1984-08-14

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