JPS556861A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS556861A
JPS556861A JP7933378A JP7933378A JPS556861A JP S556861 A JPS556861 A JP S556861A JP 7933378 A JP7933378 A JP 7933378A JP 7933378 A JP7933378 A JP 7933378A JP S556861 A JPS556861 A JP S556861A
Authority
JP
Japan
Prior art keywords
wiring
gate electrode
integrated circuit
semiconductor integrated
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7933378A
Other languages
Japanese (ja)
Inventor
Matsuo Ichinose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP7933378A priority Critical patent/JPS556861A/en
Publication of JPS556861A publication Critical patent/JPS556861A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To highly compact this device, by forming a selective oxide film of polycrystal mounted on the winding of the first region containing a gate electrode in an over-coat oxide film of the winding of the first region.
CONSTITUTION: Field oxide films 2 and gate electrode wiring 4 are made up on a P type silicon single-crystal substrate 1. Doped polycrystal silicon 5, oxide films 7 and Al wiring 9 are built up. The polycrystal silicon 5 is put to a connecting portion between the gate electrode wiring 4 and the Al wiring 9. In this case, contact force is formed in self-alignment structure to the wiring of the polycrystal silicon 5, and consequently this device can be compacted.
COPYRIGHT: (C)1980,JPO&Japio
JP7933378A 1978-06-29 1978-06-29 Semiconductor integrated circuit device Pending JPS556861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7933378A JPS556861A (en) 1978-06-29 1978-06-29 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7933378A JPS556861A (en) 1978-06-29 1978-06-29 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS556861A true JPS556861A (en) 1980-01-18

Family

ID=13686958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7933378A Pending JPS556861A (en) 1978-06-29 1978-06-29 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS556861A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5314580A (en) * 1976-07-26 1978-02-09 Hitachi Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5314580A (en) * 1976-07-26 1978-02-09 Hitachi Ltd Production of semiconductor device

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