JPS5469972A - Method of fabricating conductive polysilicon and silicon metal coupling structure - Google Patents

Method of fabricating conductive polysilicon and silicon metal coupling structure

Info

Publication number
JPS5469972A
JPS5469972A JP10988478A JP10988478A JPS5469972A JP S5469972 A JPS5469972 A JP S5469972A JP 10988478 A JP10988478 A JP 10988478A JP 10988478 A JP10988478 A JP 10988478A JP S5469972 A JPS5469972 A JP S5469972A
Authority
JP
Japan
Prior art keywords
coupling structure
silicon metal
metal coupling
conductive polysilicon
fabricating conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10988478A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6128232B2 (enFirst
Inventor
Hainritsuhi Gaensur Furitsutsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5469972A publication Critical patent/JPS5469972A/ja
Publication of JPS6128232B2 publication Critical patent/JPS6128232B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/066—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by forming silicides of refractory metals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4451—Semiconductor materials, e.g. polysilicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP10988478A 1977-11-11 1978-09-08 Method of fabricating conductive polysilicon and silicon metal coupling structure Granted JPS5469972A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/850,586 US4128670A (en) 1977-11-11 1977-11-11 Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

Publications (2)

Publication Number Publication Date
JPS5469972A true JPS5469972A (en) 1979-06-05
JPS6128232B2 JPS6128232B2 (enFirst) 1986-06-28

Family

ID=25308566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10988478A Granted JPS5469972A (en) 1977-11-11 1978-09-08 Method of fabricating conductive polysilicon and silicon metal coupling structure

Country Status (6)

Country Link
US (1) US4128670A (enFirst)
EP (1) EP0002165B1 (enFirst)
JP (1) JPS5469972A (enFirst)
CA (1) CA1092726A (enFirst)
DE (1) DE2861516D1 (enFirst)
IT (1) IT1160028B (enFirst)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5759386A (en) * 1980-08-18 1982-04-09 Fairchild Camera Instr Co Silicide layer exfoliating technique on silicon
JPS5830162A (ja) * 1981-07-30 1983-02-22 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン 電極の形成方法
JPS60221676A (ja) * 1985-03-18 1985-11-06 株式会社日立製作所 冷蔵庫

Families Citing this family (88)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487175A (en) * 1977-12-23 1979-07-11 Cho Lsi Gijutsu Kenkyu Kumiai Method of fabricating semiconductor
DE2802838A1 (de) * 1978-01-23 1979-08-16 Siemens Ag Mis-feldeffekttransistor mit kurzer kanallaenge
US4230773A (en) * 1978-12-04 1980-10-28 International Business Machines Corporation Decreasing the porosity and surface roughness of ceramic substrates
US4332839A (en) * 1978-12-29 1982-06-01 Bell Telephone Laboratories, Incorporated Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
US4276557A (en) * 1978-12-29 1981-06-30 Bell Telephone Laboratories, Incorporated Integrated semiconductor circuit structure and method for making it
USRE32207E (en) * 1978-12-29 1986-07-15 At&T Bell Laboratories Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
US4329706A (en) * 1979-03-01 1982-05-11 International Business Machines Corporation Doped polysilicon silicide semiconductor integrated circuit interconnections
DE2918888C2 (de) * 1979-05-10 1984-10-18 Siemens AG, 1000 Berlin und 8000 München MNOS-Speicherzelle und Verfahren zu ihrem Betrieb sowie zu ihrer Herstellung
NL8002609A (nl) * 1979-06-11 1980-12-15 Gen Electric Samengestelde geleidende structuur en werkwijze voor het vervaardigen daarvan.
US4228212A (en) * 1979-06-11 1980-10-14 General Electric Company Composite conductive structures in integrated circuits
US4263058A (en) * 1979-06-11 1981-04-21 General Electric Company Composite conductive structures in integrated circuits and method of making same
US4227944A (en) * 1979-06-11 1980-10-14 General Electric Company Methods of making composite conductive structures in integrated circuits
GB2061615A (en) * 1979-10-25 1981-05-13 Gen Electric Composite conductors for integrated circuits
JPS5679450A (en) * 1979-11-30 1981-06-30 Mitsubishi Electric Corp Electrode and wiring of semiconductor device
US4336550A (en) * 1980-03-20 1982-06-22 Rca Corporation CMOS Device with silicided sources and drains and method
US4343082A (en) * 1980-04-17 1982-08-10 Bell Telephone Laboratories, Incorporated Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device
USRE32613E (en) * 1980-04-17 1988-02-23 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device
US5202574A (en) * 1980-05-02 1993-04-13 Texas Instruments Incorporated Semiconductor having improved interlevel conductor insulation
US4492971A (en) * 1980-06-05 1985-01-08 At&T Bell Laboratories Metal silicide-silicon heterostructures
US4285761A (en) * 1980-06-30 1981-08-25 International Business Machines Corporation Process for selectively forming refractory metal silicide layers on semiconductor devices
US4337476A (en) * 1980-08-18 1982-06-29 Bell Telephone Laboratories, Incorporated Silicon rich refractory silicides as gate metal
JPS5737888A (en) * 1980-08-19 1982-03-02 Mitsubishi Electric Corp Photo detector
JPS5780739A (en) * 1980-11-07 1982-05-20 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
US4398335A (en) * 1980-12-09 1983-08-16 Fairchild Camera & Instrument Corporation Multilayer metal silicide interconnections for integrated circuits
US4488166A (en) * 1980-12-09 1984-12-11 Fairchild Camera & Instrument Corp. Multilayer metal silicide interconnections for integrated circuits
US4908679A (en) * 1981-01-23 1990-03-13 National Semiconductor Corporation Low resistance Schottky diode on polysilicon/metal-silicide
US4424579A (en) 1981-02-23 1984-01-03 Burroughs Corporation Mask programmable read-only memory stacked above a semiconductor substrate
JPS58500680A (ja) * 1981-05-04 1983-04-28 モトロ−ラ・インコ−ポレ−テツド 低抵抗合成金属導体を具えた半導体デバイスおよびその製造方法
US4472237A (en) * 1981-05-22 1984-09-18 At&T Bell Laboratories Reactive ion etching of tantalum and silicon
DE3250096C2 (de) * 1981-05-27 1997-09-11 Hitachi Ltd Verfahren zur Herstellung einer einen MISFET enthaltenden Halbleiterschaltung
JPS57194567A (en) * 1981-05-27 1982-11-30 Hitachi Ltd Semiconductor memory device
US4441247A (en) * 1981-06-29 1984-04-10 Intel Corporation Method of making MOS device by forming self-aligned polysilicon and tungsten composite gate
US4446476A (en) * 1981-06-30 1984-05-01 International Business Machines Corporation Integrated circuit having a sublayer electrical contact and fabrication thereof
US4476157A (en) * 1981-07-29 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing schottky barrier diode
US4398341A (en) * 1981-09-21 1983-08-16 International Business Machines Corp. Method of fabricating a highly conductive structure
US4816425A (en) * 1981-11-19 1989-03-28 Texas Instruments Incorporated Polycide process for integrated circuits
JPS5893347A (ja) * 1981-11-30 1983-06-03 Toshiba Corp Ｍｏｓ型半導体装置及びその製造方法
US4430791A (en) * 1981-12-30 1984-02-14 International Business Machines Corporation Sub-micrometer channel length field effect transistor process
DE3216823A1 (de) * 1982-05-05 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus metallsilizid und polysilizium bestehenden doppelschichten auf integrierte halbleiterschaltungen enthaltenden substraten durch reaktives ionenaetzen
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
DE3382482D1 (de) * 1982-09-30 1992-01-30 Advanced Micro Devices Inc Aluminium-metall-silicid-verbindungsstruktur fuer integrierte schaltungen und deren herstellungsverfahren.
US5136361A (en) * 1982-09-30 1992-08-04 Advanced Micro Devices, Inc. Stratified interconnect structure for integrated circuits
US4570328A (en) * 1983-03-07 1986-02-18 Motorola, Inc. Method of producing titanium nitride MOS device gate electrode
US4470189A (en) * 1983-05-23 1984-09-11 International Business Machines Corporation Process for making polycide structures
JPS59232456A (ja) * 1983-06-16 1984-12-27 Hitachi Ltd 薄膜回路素子
JPH0638496B2 (ja) * 1983-06-27 1994-05-18 日本電気株式会社 半導体装置
JPS60134466A (ja) * 1983-12-23 1985-07-17 Hitachi Ltd 半導体装置およびその製造方法
US4640844A (en) * 1984-03-22 1987-02-03 Siemens Aktiengesellschaft Method for the manufacture of gate electrodes formed of double layers of metal silicides having a high melting point and doped polycrystalline silicon
JPH067584B2 (ja) * 1984-04-05 1994-01-26 日本電気株式会社 半導体メモリ
FR2578272B1 (fr) * 1985-03-01 1987-05-22 Centre Nat Rech Scient Procede de formation sur un substrat d'une couche de siliciure de tungstene, utilisable notamment pour la realisation de couches d'interconnexion des circuits integres.
US4660276A (en) * 1985-08-12 1987-04-28 Rca Corporation Method of making a MOS field effect transistor in an integrated circuit
US5612557A (en) * 1986-10-27 1997-03-18 Seiko Epson Corporation Semiconductor device having an inter-layer insulating film disposed between two wiring layers
KR970003903B1 (en) * 1987-04-24 1997-03-22 Hitachi Mfg Kk Semiconductor device and fabricating method thereof
KR900008868B1 (ko) * 1987-09-30 1990-12-11 삼성전자 주식회사 저항성 접촉을 갖는 반도체 장치의 제조방법
US4833099A (en) * 1988-01-07 1989-05-23 Intel Corporation Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen
US4774201A (en) * 1988-01-07 1988-09-27 Intel Corporation Tungsten-silicide reoxidation technique using a CVD oxide cap
JPH0752774B2 (ja) * 1988-04-25 1995-06-05 日本電気株式会社 半導体装置
US5103276A (en) * 1988-06-01 1992-04-07 Texas Instruments Incorporated High performance composed pillar dram cell
GB2222416B (en) * 1988-08-31 1993-03-03 Watkins Johnson Co Processes using disilane
KR910005401B1 (ko) * 1988-09-07 1991-07-29 경상현 비결정 실리콘을 이용한 자기정렬 트랜지스터 제조방법
US5262846A (en) * 1988-11-14 1993-11-16 Texas Instruments Incorporated Contact-free floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
US4992391A (en) * 1989-11-29 1991-02-12 Advanced Micro Devices, Inc. Process for fabricating a control gate for a floating gate FET
US5166771A (en) * 1990-01-12 1992-11-24 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
US5124774A (en) * 1990-01-12 1992-06-23 Paradigm Technology, Inc. Compact SRAM cell layout
US5483104A (en) * 1990-01-12 1996-01-09 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
JPH0680638B2 (ja) * 1990-07-05 1994-10-12 株式会社東芝 半導体装置の製造方法
DE4021516A1 (de) * 1990-07-06 1992-01-16 Samsung Electronics Co Ltd Verfahren zum differenzierten aufwachsen von wolfram fuer die selektive chemische abscheidung aus der gasphase
US5043690A (en) * 1990-07-12 1991-08-27 Sundstrand Data Control, Inc. Balanced snap action thermal actuator
US5034348A (en) * 1990-08-16 1991-07-23 International Business Machines Corp. Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit
KR920015622A (ko) * 1991-01-31 1992-08-27 원본미기재 집적 회로의 제조방법
US5346836A (en) * 1991-06-06 1994-09-13 Micron Technology, Inc. Process for forming low resistance contacts between silicide areas and upper level polysilicon interconnects
JP2889061B2 (ja) * 1992-09-25 1999-05-10 ローム株式会社 半導体記憶装置およびその製法
US6284584B1 (en) 1993-12-17 2001-09-04 Stmicroelectronics, Inc. Method of masking for periphery salicidation of active regions
US6107194A (en) * 1993-12-17 2000-08-22 Stmicroelectronics, Inc. Method of fabricating an integrated circuit
US5441914A (en) * 1994-05-02 1995-08-15 Motorola Inc. Method of forming conductive interconnect structure
JP3380086B2 (ja) * 1995-05-26 2003-02-24 三菱電機株式会社 半導体装置の製造方法
US5804499A (en) * 1996-05-03 1998-09-08 Siemens Aktiengesellschaft Prevention of abnormal WSix oxidation by in-situ amorphous silicon deposition
US5858867A (en) * 1996-05-20 1999-01-12 Mosel Vitelic, Inc. Method of making an inverse-T tungsten gate
GB2319658B (en) * 1996-09-21 2001-08-22 United Microelectronics Corp Method of fabricating a word line
TW316326B (en) * 1996-09-21 1997-09-21 United Microelectronics Corp Manufacturing method of word line
EP0836223A3 (en) * 1996-10-08 1999-12-15 Texas Instruments Inc. Method of forming a silicide layer
US5956614A (en) * 1996-12-17 1999-09-21 Texas Instruments Incorporated Process for forming a metal-silicide gate for dynamic random access memory
JPH10326891A (ja) * 1997-05-26 1998-12-08 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6521947B1 (en) * 1999-01-28 2003-02-18 International Business Machines Corporation Method of integrating substrate contact on SOI wafers with STI process
DE10121240C1 (de) 2001-04-30 2002-06-27 Infineon Technologies Ag Verfahren zur Herstellung für eine integrierte Schaltung, insbesondere eine Anti-Fuse, und entsprechende integrierte Schaltung
US8323754B2 (en) 2004-05-21 2012-12-04 Applied Materials, Inc. Stabilization of high-k dielectric materials
US7301645B2 (en) * 2004-08-31 2007-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. In-situ critical dimension measurement
US12512172B2 (en) * 2022-06-23 2025-12-30 Nanusens SL One-time programmable memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49110276A (enFirst) * 1973-02-21 1974-10-21
JPS49115659A (enFirst) * 1973-03-07 1974-11-05

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3375418A (en) * 1964-09-15 1968-03-26 Sprague Electric Co S-m-s device with partial semiconducting layers
NL7204543A (enFirst) * 1971-04-08 1972-10-10
IN143383B (enFirst) * 1974-06-13 1977-11-12 Rca Corp
US3987216A (en) * 1975-12-31 1976-10-19 International Business Machines Corporation Method of forming schottky barrier junctions having improved barrier height
US4102733A (en) * 1977-04-29 1978-07-25 International Business Machines Corporation Two and three mask process for IGFET fabrication

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49110276A (enFirst) * 1973-02-21 1974-10-21
JPS49115659A (enFirst) * 1973-03-07 1974-11-05

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5759386A (en) * 1980-08-18 1982-04-09 Fairchild Camera Instr Co Silicide layer exfoliating technique on silicon
JPS5830162A (ja) * 1981-07-30 1983-02-22 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン 電極の形成方法
JPS60221676A (ja) * 1985-03-18 1985-11-06 株式会社日立製作所 冷蔵庫

Also Published As

Publication number Publication date
JPS6128232B2 (enFirst) 1986-06-28
IT1160028B (it) 1987-03-04
EP0002165B1 (fr) 1982-01-06
EP0002165A1 (fr) 1979-05-30
DE2861516D1 (en) 1982-02-25
IT7829280A0 (it) 1978-10-31
US4128670A (en) 1978-12-05
CA1092726A (en) 1980-12-30

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