JPS54107681A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS54107681A
JPS54107681A JP1471678A JP1471678A JPS54107681A JP S54107681 A JPS54107681 A JP S54107681A JP 1471678 A JP1471678 A JP 1471678A JP 1471678 A JP1471678 A JP 1471678A JP S54107681 A JPS54107681 A JP S54107681A
Authority
JP
Japan
Prior art keywords
region
type
regions
diffusion
island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1471678A
Other languages
Japanese (ja)
Other versions
JPS5917867B2 (en
Inventor
Hideaki Sadamatsu
Toyoki Takemoto
Haruyasu Yamada
Michihiro Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1471678A priority Critical patent/JPS5917867B2/en
Publication of JPS54107681A publication Critical patent/JPS54107681A/en
Publication of JPS5917867B2 publication Critical patent/JPS5917867B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To establish the J-FET having required transfer conductance and low noise performance with small occupied area, by reducing the number of contacts for electrode pick up through electrical connection of the source or drain region, in the external region of the island region being the gate region.
CONSTITUTION: The N+ type implanted region 114 is formed by diffusion on the P type Si substrate 101, the entire surface is grown epitaxially for the N type layer, and the epitaxial layer is constituted into the island region 102 by providing the P type separation region reaching the substrate 101 at the both ends. Further, in this island region 102, the P type well region 103 being the back gate is formed by diffusion, and the N type source regions 106a and 105b are formed in it. After that, the N type drain regions 106a, 106b and 106c are formed by diffusion bridged to the regions 102 and 103, and the P+ type gate region 108 is provided on the surface of the channel regions 107a to 107d produced, determining required gm. Further, on the regions 105a and 105b, the electrode wiring 109 is formed and the electrode wiring 110 is coated on the region 106a, reducing the numbet of contacts for pick up.
COPYRIGHT: (C)1979,JPO&Japio
JP1471678A 1978-02-10 1978-02-10 Semiconductor integrated circuit device Expired JPS5917867B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1471678A JPS5917867B2 (en) 1978-02-10 1978-02-10 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1471678A JPS5917867B2 (en) 1978-02-10 1978-02-10 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS54107681A true JPS54107681A (en) 1979-08-23
JPS5917867B2 JPS5917867B2 (en) 1984-04-24

Family

ID=11868860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1471678A Expired JPS5917867B2 (en) 1978-02-10 1978-02-10 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5917867B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534556U (en) * 1991-10-17 1993-05-07 理化工業株式会社 Humidity calibrator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534556U (en) * 1991-10-17 1993-05-07 理化工業株式会社 Humidity calibrator

Also Published As

Publication number Publication date
JPS5917867B2 (en) 1984-04-24

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