JPH11338765A - アドレス変換回路および半導体記憶装置 - Google Patents
アドレス変換回路および半導体記憶装置Info
- Publication number
- JPH11338765A JPH11338765A JP14715798A JP14715798A JPH11338765A JP H11338765 A JPH11338765 A JP H11338765A JP 14715798 A JP14715798 A JP 14715798A JP 14715798 A JP14715798 A JP 14715798A JP H11338765 A JPH11338765 A JP H11338765A
- Authority
- JP
- Japan
- Prior art keywords
- address
- memory
- conversion circuit
- memory unit
- address conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
- Dram (AREA)
- Memory System (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14715798A JPH11338765A (ja) | 1998-05-28 | 1998-05-28 | アドレス変換回路および半導体記憶装置 |
TW088108696A TW425575B (en) | 1998-05-28 | 1999-05-25 | Address space manager for assigning part of address space to data storage without non-addresable cell, semiconductor memory device with built-in address space manager and memory system |
KR1019990019362A KR19990088620A (ko) | 1998-05-28 | 1999-05-28 | 비-어드레스가능셀없이어드레스공간의일부를데이타기억장치에할당하기위한어드레스공간관리자,어드레스공간관리자가내장된반도체메모리및메모리시스템 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14715798A JPH11338765A (ja) | 1998-05-28 | 1998-05-28 | アドレス変換回路および半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11338765A true JPH11338765A (ja) | 1999-12-10 |
Family
ID=15423883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14715798A Pending JPH11338765A (ja) | 1998-05-28 | 1998-05-28 | アドレス変換回路および半導体記憶装置 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH11338765A (ko) |
KR (1) | KR19990088620A (ko) |
TW (1) | TW425575B (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007184072A (ja) * | 2005-12-29 | 2007-07-19 | Samsung Electronics Co Ltd | 半導体装置のアドレス変換器及び半導体メモリ装置 |
JP2017174486A (ja) * | 2016-03-23 | 2017-09-28 | 華邦電子股▲ふん▼有限公司Winbond Electronics Corp. | オプションコード供与回路及びその供与方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8775579B2 (en) * | 2010-01-13 | 2014-07-08 | Htc Corporation | Method for addressing management object in management tree and associated device management system |
-
1998
- 1998-05-28 JP JP14715798A patent/JPH11338765A/ja active Pending
-
1999
- 1999-05-25 TW TW088108696A patent/TW425575B/zh not_active IP Right Cessation
- 1999-05-28 KR KR1019990019362A patent/KR19990088620A/ko not_active Application Discontinuation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007184072A (ja) * | 2005-12-29 | 2007-07-19 | Samsung Electronics Co Ltd | 半導体装置のアドレス変換器及び半導体メモリ装置 |
JP2017174486A (ja) * | 2016-03-23 | 2017-09-28 | 華邦電子股▲ふん▼有限公司Winbond Electronics Corp. | オプションコード供与回路及びその供与方法 |
US10579290B2 (en) | 2016-03-23 | 2020-03-03 | Winbond Electronics Corp. | Option code providing circuit and providing method thereof |
Also Published As
Publication number | Publication date |
---|---|
KR19990088620A (ko) | 1999-12-27 |
TW425575B (en) | 2001-03-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1259963B1 (en) | Memory device with support for unaligned access | |
JP2002117686A (ja) | 不揮発性メモリデバイス、メモリアレイ、および、不揮発性メモリに情報ビットとしてコード化された情報を記憶する方法 | |
JP4731020B2 (ja) | 半導体記憶装置、セクタアドレス変換回路、アドレス変換方法及び半導体記憶装置の使用方法 | |
KR100468635B1 (ko) | 비휘발성 반도체 기억 장치 및 정보기기 | |
KR100923989B1 (ko) | 배드 블록을 리맵핑하는 플래시 메모리 장치 및 그것의배드 블록의 리맵핑 방법 | |
JPH11338765A (ja) | アドレス変換回路および半導体記憶装置 | |
JP4175694B2 (ja) | フラッシュメモリ及びフラッシュメモリを搭載するシステム | |
JPH07302254A (ja) | マイクロコンピュータシステム | |
JPS62279598A (ja) | 読出し専用メモリ | |
US6029210A (en) | Memory initialization system selectively outputting a data between a normal data stored in the memory and a fixed value according to a registered access state | |
JP2900944B2 (ja) | 半導体メモリ | |
US4831587A (en) | Memory address circuit having function of exchanging selected bits of address input | |
JPH1153338A (ja) | 半導体集積回路およびその半導体集積回路における外部バスモード選択方法 | |
JPH1139212A (ja) | マイクロコンピュータ | |
US5991212A (en) | Semi-conductor integrated circuit device having an external memory and a test method therefor | |
JP2860655B2 (ja) | 並列命令実行型プロセッサ | |
JPH0259560B2 (ko) | ||
KR100388207B1 (ko) | 플래시 메모리 컨트롤러 | |
JP2000322894A (ja) | 半導体記憶装置 | |
JPH0713860A (ja) | 情報処理装置 | |
JP2954988B2 (ja) | 情報処理装置 | |
JP2005157454A (ja) | ワンチップマイクロコンピュータおよびワンチップマイクロコンピュータの製造方法 | |
JPH0696597A (ja) | 半導体メモリ装置 | |
JPH1139222A (ja) | マイクロコンピュータ | |
JPH04177439A (ja) | シングルチップ・マイクロコンピュータ |