JPH08507868A - Ｉｃにおける信号経路およびバイアス経路の分離ｉ▲下ｄｄｑ▼試験 - Google Patents
Ｉｃにおける信号経路およびバイアス経路の分離ｉ▲下ｄｄｑ▼試験Info
- Publication number
- JPH08507868A JPH08507868A JP7516636A JP51663695A JPH08507868A JP H08507868 A JPH08507868 A JP H08507868A JP 7516636 A JP7516636 A JP 7516636A JP 51663695 A JP51663695 A JP 51663695A JP H08507868 A JPH08507868 A JP H08507868A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- node
- bias
- circuit
- supply node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 38
- 238000002955 isolation Methods 0.000 title description 7
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 238000000034 method Methods 0.000 claims description 23
- 239000004065 semiconductor Substances 0.000 claims description 6
- 230000000694 effects Effects 0.000 abstract description 7
- 238000000691 measurement method Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 description 11
- 238000005259 measurement Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 230000002950 deficient Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000010998 test method Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000011960 computer-aided design Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2882—Testing timing characteristics
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
- G01R31/3008—Quiescent current [IDDQ] test or leakage current test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP93203546 | 1993-12-16 | ||
| EP93203546.2 | 1993-12-16 | ||
| EP94200505 | 1994-02-28 | ||
| EP94200505.9 | 1994-02-28 | ||
| PCT/IB1994/000389 WO1995016923A1 (en) | 1993-12-16 | 1994-12-05 | Separate iddq-testing of signal path and bias path in an ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08507868A true JPH08507868A (ja) | 1996-08-20 |
Family
ID=26134094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7516636A Pending JPH08507868A (ja) | 1993-12-16 | 1994-12-05 | Ｉｃにおける信号経路およびバイアス経路の分離ｉ▲下ｄｄｑ▼試験 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5625300A (enExample) |
| EP (1) | EP0685073A1 (enExample) |
| JP (1) | JPH08507868A (enExample) |
| KR (1) | KR100358609B1 (enExample) |
| TW (1) | TW267246B (enExample) |
| WO (1) | WO1995016923A1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007501979A (ja) * | 2003-08-07 | 2007-02-01 | ローズマウント インコーポレイテッド | ループオーバライド付きプロセス装置 |
| JP2008152855A (ja) * | 2006-12-18 | 2008-07-03 | Renesas Technology Corp | 半導体集積回路とその製造方法 |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0161736B1 (ko) * | 1995-06-30 | 1999-02-01 | 김주용 | 접합 리키지 전류 측정방법 |
| TW280869B (en) * | 1995-07-17 | 1996-07-11 | Philips Electronics Nv | IDDQ-testing of bias generator circuit |
| DE19610065A1 (de) * | 1996-03-14 | 1997-09-18 | Siemens Ag | Verfahren zur Abschätzung der Lebensdauer eines Leistungshalbleiter-Bauelements |
| JPH09292438A (ja) * | 1996-04-30 | 1997-11-11 | Toshiba Corp | Ｃｍｏｓ集積回路装置、その検査方法及び検査装置 |
| US6023186A (en) * | 1996-04-30 | 2000-02-08 | Kabushiki Kaisha Toshiba | CMOS integrated circuit device and inspection method thereof |
| US5742177A (en) * | 1996-09-27 | 1998-04-21 | Intel Corporation | Method for testing a semiconductor device by measuring quiescent currents (IDDQ) at two different temperatures |
| WO1999017354A1 (en) * | 1997-09-30 | 1999-04-08 | Siemens Aktiengesellschaft | A system for identifying defective electronic devices |
| DE19902031A1 (de) * | 1999-01-20 | 2000-07-27 | Bosch Gmbh Robert | Steuergerät zur Steuerung sicherheitskritischer Anwendungen |
| DE69926126T2 (de) | 1999-09-14 | 2006-05-11 | Stmicroelectronics S.R.L., Agrate Brianza | Verfahren zur ruhestrombestimmung |
| US6459293B1 (en) * | 2000-09-29 | 2002-10-01 | Intel Corporation | Multiple parameter testing with improved sensitivity |
| CN100495056C (zh) * | 2003-02-20 | 2009-06-03 | 国际商业机器公司 | 用于测试具有阱的集成电路的方法和系统 |
| US7486098B2 (en) | 2005-06-16 | 2009-02-03 | International Business Machines Corporation | Integrated circuit testing method using well bias modification |
| KR100843650B1 (ko) * | 2005-06-28 | 2008-07-04 | 인터내셔널 비지네스 머신즈 코포레이션 | 웰 바이어스 수정을 사용하는 집적 회로 테스트 방법 |
| TW201513300A (zh) * | 2013-09-17 | 2015-04-01 | Wave Semiconductor Inc | 基於矽晶絕緣體技術之多臨界電路 |
| CN106960802B (zh) * | 2016-01-11 | 2019-10-15 | 北大方正集团有限公司 | 一种半导体静态电流的测试器件及测试方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4542340A (en) * | 1982-12-30 | 1985-09-17 | Ibm Corporation | Testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells |
| US4835458A (en) * | 1987-11-09 | 1989-05-30 | Intel Corporation | Signature analysis technique for defect characterization of CMOS static RAM cell failures |
| US5025344A (en) * | 1988-11-30 | 1991-06-18 | Carnegie Mellon University | Built-in current testing of integrated circuits |
| NL8900050A (nl) * | 1989-01-10 | 1990-08-01 | Philips Nv | Inrichting voor het meten van een ruststroom van een geintegreerde monolitische digitale schakeling, geintegreerde monolitische digitale schakeling voorzien van een dergelijke inrichting en testapparaat voorzien van een dergelijke inrichting. |
| US5332973A (en) * | 1992-05-01 | 1994-07-26 | The University Of Manitoba | Built-in fault testing of integrated circuits |
| US5325054A (en) * | 1992-07-07 | 1994-06-28 | Texas Instruments Incorporated | Method and system for screening reliability of semiconductor circuits |
| US5392293A (en) * | 1993-02-26 | 1995-02-21 | At&T Corp. | Built-in current sensor for IDDQ testing |
-
1994
- 1994-12-05 JP JP7516636A patent/JPH08507868A/ja active Pending
- 1994-12-05 WO PCT/IB1994/000389 patent/WO1995016923A1/en not_active Ceased
- 1994-12-05 KR KR1019950703486A patent/KR100358609B1/ko not_active Expired - Fee Related
- 1994-12-05 EP EP95900894A patent/EP0685073A1/en not_active Withdrawn
- 1994-12-13 TW TW083111629A patent/TW267246B/zh active
- 1994-12-14 US US08/355,569 patent/US5625300A/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007501979A (ja) * | 2003-08-07 | 2007-02-01 | ローズマウント インコーポレイテッド | ループオーバライド付きプロセス装置 |
| JP2008152855A (ja) * | 2006-12-18 | 2008-07-03 | Renesas Technology Corp | 半導体集積回路とその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US5625300A (en) | 1997-04-29 |
| TW267246B (enExample) | 1996-01-01 |
| KR100358609B1 (ko) | 2003-01-14 |
| EP0685073A1 (en) | 1995-12-06 |
| WO1995016923A1 (en) | 1995-06-22 |
| KR960701372A (ko) | 1996-02-24 |
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