JPH08330921A - 可変遅延回路 - Google Patents
可変遅延回路Info
- Publication number
- JPH08330921A JPH08330921A JP7136408A JP13640895A JPH08330921A JP H08330921 A JPH08330921 A JP H08330921A JP 7136408 A JP7136408 A JP 7136408A JP 13640895 A JP13640895 A JP 13640895A JP H08330921 A JPH08330921 A JP H08330921A
- Authority
- JP
- Japan
- Prior art keywords
- field effect
- effect transistor
- delay circuit
- delay time
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 claims abstract description 34
- 239000003990 capacitor Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 21
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
- H03K5/134—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices with field-effect transistors
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7136408A JPH08330921A (ja) | 1995-06-02 | 1995-06-02 | 可変遅延回路 |
PCT/JP1996/001482 WO1996038912A1 (fr) | 1995-06-02 | 1996-05-31 | Circuit a retard variable |
KR1019970700673A KR970705234A (ko) | 1995-06-02 | 1996-05-31 | 가변지연회로 |
DE19680525T DE19680525T1 (de) | 1995-06-02 | 1996-05-31 | Veränderbare Verzögerungsschaltung |
TW085107303A TW307955B (enrdf_load_stackoverflow) | 1995-06-02 | 1996-06-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7136408A JPH08330921A (ja) | 1995-06-02 | 1995-06-02 | 可変遅延回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08330921A true JPH08330921A (ja) | 1996-12-13 |
Family
ID=15174470
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7136408A Pending JPH08330921A (ja) | 1995-06-02 | 1995-06-02 | 可変遅延回路 |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH08330921A (enrdf_load_stackoverflow) |
KR (1) | KR970705234A (enrdf_load_stackoverflow) |
DE (1) | DE19680525T1 (enrdf_load_stackoverflow) |
TW (1) | TW307955B (enrdf_load_stackoverflow) |
WO (1) | WO1996038912A1 (enrdf_load_stackoverflow) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004077673A1 (ja) * | 2003-02-25 | 2004-09-10 | Matsushita Electric Industrial Co., Ltd. | 半導体集積回路 |
JP2005159963A (ja) * | 2003-11-28 | 2005-06-16 | Advantest Corp | 高周波遅延回路、及び試験装置 |
WO2007013577A1 (ja) * | 2005-07-29 | 2007-02-01 | Advantest Corporation | タイミング発生器及び半導体試験装置 |
JP2007509541A (ja) * | 2003-10-16 | 2007-04-12 | インテル・コーポレーション | 適応型入力/出力バッファ及びその方法 |
JPWO2006134837A1 (ja) * | 2005-06-17 | 2009-01-08 | 株式会社アドバンテスト | 遅延回路、試験装置、タイミング発生器、テストモジュール、及び電子デバイス |
JP2009268058A (ja) * | 2008-04-28 | 2009-11-12 | Hynix Semiconductor Inc | センシング遅延回路及びこれを用いた半導体メモリー装置 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100489587B1 (ko) * | 1997-12-29 | 2005-08-23 | 주식회사 하이닉스반도체 | 시간지연회로 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62272619A (ja) * | 1986-05-21 | 1987-11-26 | Hitachi Ltd | 遅延回路 |
JPS63246916A (ja) * | 1987-04-02 | 1988-10-13 | Mitsubishi Electric Corp | インバ−タ回路 |
US5352945A (en) * | 1993-03-18 | 1994-10-04 | Micron Semiconductor, Inc. | Voltage compensating delay element |
-
1995
- 1995-06-02 JP JP7136408A patent/JPH08330921A/ja active Pending
-
1996
- 1996-05-31 WO PCT/JP1996/001482 patent/WO1996038912A1/ja not_active Application Discontinuation
- 1996-05-31 KR KR1019970700673A patent/KR970705234A/ko not_active Ceased
- 1996-05-31 DE DE19680525T patent/DE19680525T1/de not_active Ceased
- 1996-06-17 TW TW085107303A patent/TW307955B/zh active
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004077673A1 (ja) * | 2003-02-25 | 2004-09-10 | Matsushita Electric Industrial Co., Ltd. | 半導体集積回路 |
CN100340062C (zh) * | 2003-02-25 | 2007-09-26 | 松下电器产业株式会社 | 半导体集成电路 |
US7498865B2 (en) | 2003-02-25 | 2009-03-03 | Panasonic Corporation | Semiconductor integrated circuit with reduced speed variations |
JP2007509541A (ja) * | 2003-10-16 | 2007-04-12 | インテル・コーポレーション | 適応型入力/出力バッファ及びその方法 |
JP2005159963A (ja) * | 2003-11-28 | 2005-06-16 | Advantest Corp | 高周波遅延回路、及び試験装置 |
JPWO2006134837A1 (ja) * | 2005-06-17 | 2009-01-08 | 株式会社アドバンテスト | 遅延回路、試験装置、タイミング発生器、テストモジュール、及び電子デバイス |
JP4850176B2 (ja) * | 2005-06-17 | 2012-01-11 | 株式会社アドバンテスト | 遅延回路、試験装置、タイミング発生器、テストモジュール、及び電子デバイス |
WO2007013577A1 (ja) * | 2005-07-29 | 2007-02-01 | Advantest Corporation | タイミング発生器及び半導体試験装置 |
JP2007033385A (ja) * | 2005-07-29 | 2007-02-08 | Advantest Corp | タイミング発生器及び半導体試験装置 |
KR100966701B1 (ko) * | 2005-07-29 | 2010-06-29 | 가부시키가이샤 어드밴티스트 | 타이밍 발생기 및 반도체 시험 장치 |
US7940072B2 (en) | 2005-07-29 | 2011-05-10 | Advantest Corp. | Timing generator and semiconductor test apparatus |
JP2009268058A (ja) * | 2008-04-28 | 2009-11-12 | Hynix Semiconductor Inc | センシング遅延回路及びこれを用いた半導体メモリー装置 |
Also Published As
Publication number | Publication date |
---|---|
WO1996038912A1 (fr) | 1996-12-05 |
KR970705234A (ko) | 1997-09-06 |
TW307955B (enrdf_load_stackoverflow) | 1997-06-11 |
DE19680525T1 (de) | 1997-07-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6191630B1 (en) | Delay circuit and oscillator circuit using same | |
US3931588A (en) | Voltage controlled oscillator utilizing field effect transistors | |
US5764110A (en) | Voltage controlled ring oscillator stabilized against supply voltage fluctuations | |
US9785176B2 (en) | Small-circuit-scale reference voltage generating circuit | |
EP0829135B1 (en) | Phase shifting circuit and method for providing a phase shift | |
TW202137702A (zh) | 可調節電流模式弛張振盪器 | |
JPH01200816A (ja) | リング発振器 | |
US7425857B2 (en) | Time-delay circuit | |
JPH07202653A (ja) | 時間遅延回路 | |
JP3109560B2 (ja) | ばらつき補償技術による半導体集積回路 | |
KR100338482B1 (ko) | 제어가능지연회로 | |
US5010338A (en) | Comparator circuit and analog to digital converter | |
JPH08330921A (ja) | 可変遅延回路 | |
KR100331400B1 (ko) | 반도체회로 | |
JP2591981B2 (ja) | アナログ電圧比較器 | |
JPH04115622A (ja) | カレントミラー型増幅回路及びその駆動方法 | |
US6975100B2 (en) | Circuit arrangement for regulating the duty cycle of electrical signal | |
US6025747A (en) | Logic signal selection circuit | |
JPH1098356A (ja) | 電圧制御発振器 | |
JPS6251008B2 (enrdf_load_stackoverflow) | ||
US5166540A (en) | Stepped signal generating circuit | |
JPH04219025A (ja) | 電流発生装置およびd/a変換装置 | |
EP1564886A1 (en) | Time-delay circuit | |
KR940005060Y1 (ko) | 펄스 발생기 | |
JPS6396800A (ja) | Cmosサンプルホ−ルド回路 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040330 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040824 |