JPH0821697B2 - 半導体メモリ装置の製造方法 - Google Patents

半導体メモリ装置の製造方法

Info

Publication number
JPH0821697B2
JPH0821697B2 JP4339292A JP33929292A JPH0821697B2 JP H0821697 B2 JPH0821697 B2 JP H0821697B2 JP 4339292 A JP4339292 A JP 4339292A JP 33929292 A JP33929292 A JP 33929292A JP H0821697 B2 JPH0821697 B2 JP H0821697B2
Authority
JP
Japan
Prior art keywords
forming
material layer
transistor
region
contact hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4339292A
Other languages
English (en)
Japanese (ja)
Other versions
JPH06181295A (ja
Inventor
泰 雨 李
陽 求 李
炳 學 林
東 建 朴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH06181295A publication Critical patent/JPH06181295A/ja
Publication of JPH0821697B2 publication Critical patent/JPH0821697B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335Making a connection between the transistor and the capacitor, e.g. plug

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP4339292A 1991-12-18 1992-12-18 半導体メモリ装置の製造方法 Expired - Fee Related JPH0821697B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019910023394A KR930015002A (ko) 1991-12-18 1991-12-18 반도체 메모리 장치 및 그 제조방법
KR1991-023394 1991-12-18

Publications (2)

Publication Number Publication Date
JPH06181295A JPH06181295A (ja) 1994-06-28
JPH0821697B2 true JPH0821697B2 (ja) 1996-03-04

Family

ID=19325168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4339292A Expired - Fee Related JPH0821697B2 (ja) 1991-12-18 1992-12-18 半導体メモリ装置の製造方法

Country Status (5)

Country Link
US (1) US5441908A (https=)
JP (1) JPH0821697B2 (https=)
KR (1) KR930015002A (https=)
DE (1) DE4242840A1 (https=)
GB (1) GB2262657B (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452244A (en) * 1994-08-10 1995-09-19 Cirrus Logic, Inc. Electronic memory and methods for making and using the same
US5534457A (en) * 1995-01-20 1996-07-09 Industrial Technology Research Institute Method of forming a stacked capacitor with an "I" shaped storage node
US5707897A (en) * 1996-05-16 1998-01-13 Taiwan Semiconductor Manufacturing Company Ltd. Non-volatile-memory cell for electrically programmable read only memory having a trench-like coupling capacitors
US5753551A (en) * 1996-11-25 1998-05-19 Vanguard International Semiconductor Corporation Memory cell array with a self-aligned, buried bit line
US5780339A (en) * 1997-05-02 1998-07-14 Vanguard International Semiconductor Corporation Method for fabricating a semiconductor memory cell in a DRAM
US5970358A (en) * 1997-06-30 1999-10-19 Micron Technology, Inc. Method for forming a capacitor wherein the first capacitor plate includes electrically coupled conductive layers separated by an intervening insulative layer
US6235571B1 (en) * 1999-03-31 2001-05-22 Micron Technology, Inc. Uniform dielectric layer and method to form same
US6472268B1 (en) * 2001-11-01 2002-10-29 Hynix Semiconductor, Inc. Method for forming storage node contact

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2723530B2 (ja) * 1988-04-13 1998-03-09 日本電気株式会社 ダイナミック型ランダムアクセスメモリ装置の製造方法
US4958318A (en) * 1988-07-08 1990-09-18 Eliyahou Harari Sidewall capacitor DRAM cell
JPH02263467A (ja) * 1989-04-04 1990-10-26 Sony Corp メモリ装置
JPH02312269A (ja) * 1989-05-26 1990-12-27 Toshiba Corp 半導体記憶装置およびその製造方法
JPH0376159A (ja) * 1989-08-18 1991-04-02 Sony Corp 半導体メモリ
JP2894740B2 (ja) * 1989-09-25 1999-05-24 日本電気株式会社 Mos型半導体装置
KR930005741B1 (ko) * 1990-11-01 1993-06-24 삼성전자 주식회사 터널구조의 디램 셀 및 그의 제조방법
JPH0430464A (ja) * 1990-05-25 1992-02-03 Fujitsu Ltd 半導体装置及びその製造方法
EP0480411A1 (en) * 1990-10-10 1992-04-15 Micron Technology, Inc. Stacked capacitor DRAM
US5234857A (en) * 1991-03-23 1993-08-10 Samsung Electronics, Co., Ltd. Method of making semiconductor device having a capacitor of large capacitance

Also Published As

Publication number Publication date
GB9226294D0 (en) 1993-02-10
GB2262657A (en) 1993-06-23
US5441908A (en) 1995-08-15
GB2262657B (en) 1995-11-01
JPH06181295A (ja) 1994-06-28
DE4242840A1 (https=) 1993-06-24
KR930015002A (ko) 1993-07-23

Similar Documents

Publication Publication Date Title
US5422295A (en) Method for forming a semiconductor memory device having a vertical multi-layered storage electrode
US5488007A (en) Method of manufacture of a semiconductor device
US6426243B1 (en) Methods of forming dynamic random access memory circuitry
JP2930016B2 (ja) 半導体装置の製造方法
JPH07105442B2 (ja) 高集積半導体装置のコンタクトの製造方法
JP3222944B2 (ja) Dramセルのキャパシタの製造方法
US5508223A (en) Method for manufacturing DRAM cell with fork-shaped capacitor
KR100189963B1 (ko) 반도체 메모리장치 및 그 제조방법
KR960009998B1 (ko) 반도체 메모리장치의 제조방법
JPH077083A (ja) 語線間に部分使い捨て誘電充填材ストリップを用いて超高密度ダイナミック・アクセス・メモリを製造する方法
JP3640763B2 (ja) 半導体メモリ素子のキャパシタの製造方法
US5851878A (en) Method of forming a rugged polysilicon fin structure in DRAM
JP3607444B2 (ja) 半導体装置のキャパシタ製造方法
US5571742A (en) Method of fabricating stacked capacitor of DRAM cell
JP2741672B2 (ja) スタック形dramセルのキャパシタ製造方法
JP2780156B2 (ja) 半導体メモリ装置及びその製造方法
JPH0821697B2 (ja) 半導体メモリ装置の製造方法
JP3686169B2 (ja) 半導体装置の配線方法
JP3104666B2 (ja) 半導体素子及びその製造方法
US6291293B1 (en) Method for fabricating an open can-type stacked capacitor on an uneven surface
JP3305483B2 (ja) 半導体装置及びその製造方法
CN1044947C (zh) 形成半导体器件电荷存贮电极的方法
KR100230350B1 (ko) 반도체 장치 및 그 제조 방법
JP2882387B2 (ja) 半導体装置の製造方法
JPH11330400A (ja) ダイナミックramセルキャパシタの製造方法

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080304

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090304

Year of fee payment: 13

LAPS Cancellation because of no payment of annual fees