JPH0682146B2 - スキヤンパス方式の論理集積回路 - Google Patents

スキヤンパス方式の論理集積回路

Info

Publication number
JPH0682146B2
JPH0682146B2 JP61307009A JP30700986A JPH0682146B2 JP H0682146 B2 JPH0682146 B2 JP H0682146B2 JP 61307009 A JP61307009 A JP 61307009A JP 30700986 A JP30700986 A JP 30700986A JP H0682146 B2 JPH0682146 B2 JP H0682146B2
Authority
JP
Japan
Prior art keywords
flip
input terminal
circuit
selector
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61307009A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63158475A (ja
Inventor
英晴 尾崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP61307009A priority Critical patent/JPH0682146B2/ja
Priority to US07/136,572 priority patent/US4876704A/en
Priority to DE19873743586 priority patent/DE3743586A1/de
Publication of JPS63158475A publication Critical patent/JPS63158475A/ja
Publication of JPH0682146B2 publication Critical patent/JPH0682146B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP61307009A 1986-12-22 1986-12-22 スキヤンパス方式の論理集積回路 Expired - Lifetime JPH0682146B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP61307009A JPH0682146B2 (ja) 1986-12-22 1986-12-22 スキヤンパス方式の論理集積回路
US07/136,572 US4876704A (en) 1986-12-22 1987-12-22 Logic integrated circuit for scan path system
DE19873743586 DE3743586A1 (de) 1986-12-22 1987-12-22 Integrierte logikschaltung fuer das abtastwegesystem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61307009A JPH0682146B2 (ja) 1986-12-22 1986-12-22 スキヤンパス方式の論理集積回路

Publications (2)

Publication Number Publication Date
JPS63158475A JPS63158475A (ja) 1988-07-01
JPH0682146B2 true JPH0682146B2 (ja) 1994-10-19

Family

ID=17963917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61307009A Expired - Lifetime JPH0682146B2 (ja) 1986-12-22 1986-12-22 スキヤンパス方式の論理集積回路

Country Status (3)

Country Link
US (1) US4876704A (en, 2012)
JP (1) JPH0682146B2 (en, 2012)
DE (1) DE3743586A1 (en, 2012)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03214809A (ja) * 1990-01-19 1991-09-20 Nec Corp リニアフィードバック・シフトレジスタ
JP2567972B2 (ja) * 1990-06-06 1996-12-25 富士通株式会社 フリップフロップ回路及び半導体集積回路
US5063578A (en) * 1990-09-24 1991-11-05 At&T Bell Laboratories Digital logic circuits for frequency multiplication
US5295174A (en) * 1990-11-21 1994-03-15 Nippon Steel Corporation Shifting circuit and shift register
US5414714A (en) * 1992-03-26 1995-05-09 Motorola, Inc. Method and apparatus for scan testing an array in a data processing system
US5369752A (en) * 1992-06-01 1994-11-29 Motorola, Inc. Method and apparatus for shifting data in an array of storage elements in a data processing system
US5485466A (en) * 1993-10-04 1996-01-16 Motorola, Inc. Method and apparatus for performing dual scan path testing of an array in a data processing system
WO1997001811A2 (en) * 1995-06-27 1997-01-16 Philips Electronics N.V. Pipelined data processing circuit
JPH11328947A (ja) * 1998-05-18 1999-11-30 Nec Corp 大規模ｆｉｆｏ回路
US6547356B2 (en) 2001-02-09 2003-04-15 Lexmark International, Inc. Latching serial data in an ink jet print head
US6434213B1 (en) * 2001-03-08 2002-08-13 Cirrus Logic, Inc. Low-power low-area shift register
US7499519B1 (en) * 2007-12-12 2009-03-03 Taiwan Semiconductor Manufacturing Co., Ltd. Bidirectional shift register
US8471608B2 (en) * 2011-02-02 2013-06-25 Texas Instruments Incorporated Clock divider circuit
CN114325358A (zh) * 2021-12-30 2022-04-12 上海安路信息科技股份有限公司 Fpga内部故障捕获电路及其方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3777278A (en) * 1971-09-10 1973-12-04 Boeing Co Pseudo-random frequency generator
US3806891A (en) * 1972-12-26 1974-04-23 Ibm Logic circuit for scan-in/scan-out
US3949199A (en) * 1974-09-06 1976-04-06 Avco Corporation Pulse width decoder
FR2451672A1 (fr) * 1979-03-15 1980-10-10 Nippon Electric Co Circuit logique integre pour l'execution de tests
US4377757A (en) * 1980-02-11 1983-03-22 Siemens Aktiengesellschaft Logic module for integrated digital circuits
JPS59119443A (ja) * 1982-12-27 1984-07-10 Toshiba Corp 論理回路
US4627085A (en) * 1984-06-29 1986-12-02 Applied Micro Circuits Corporation Flip-flop control circuit
GB8501143D0 (en) * 1985-01-17 1985-02-20 Plessey Co Plc Integrated circuits
US4682329A (en) * 1985-03-28 1987-07-21 Kluth Daniel J Test system providing testing sites for logic circuits
DE3687407T2 (de) * 1985-10-15 1993-06-24 Sony Corp Logische schaltung mit zusammengeschalteten mehrtorflip-flops.
US4754215A (en) * 1985-11-06 1988-06-28 Nec Corporation Self-diagnosable integrated circuit device capable of testing sequential circuit elements
US4698830A (en) * 1986-04-10 1987-10-06 International Business Machines Corporation Shift register latch arrangement for enhanced testability in differential cascode voltage switch circuit
JPS63182585A (ja) * 1987-01-26 1988-07-27 Toshiba Corp テスト容易化機能を備えた論理回路

Also Published As

Publication number Publication date
DE3743586A1 (de) 1988-07-07
DE3743586C2 (en, 2012) 1989-06-01
US4876704A (en) 1989-10-24
JPS63158475A (ja) 1988-07-01

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term