JPH065699B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH065699B2
JPH065699B2 JP62233108A JP23310887A JPH065699B2 JP H065699 B2 JPH065699 B2 JP H065699B2 JP 62233108 A JP62233108 A JP 62233108A JP 23310887 A JP23310887 A JP 23310887A JP H065699 B2 JPH065699 B2 JP H065699B2
Authority
JP
Japan
Prior art keywords
metal plate
heat sink
semiconductor device
resin
nickel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62233108A
Other languages
English (en)
Other versions
JPS6473750A (en
Inventor
隆 宮本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP62233108A priority Critical patent/JPH065699B2/ja
Priority to US07/244,940 priority patent/US4876588A/en
Publication of JPS6473750A publication Critical patent/JPS6473750A/ja
Publication of JPH065699B2 publication Critical patent/JPH065699B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特にヒートシンクを有する
半導体装置の構造に関する。
〔従来の技術〕
ヒートシンク付き半導体装置として、第3図(a)に示す
ように、アルミナ(Al2O3)を主成分とするセラミック基
板1の中央部に貫通孔2を設け、これを塞ぐように銅/
タングステン複合金属などの金属板3がセラミック基板
1に後述する方法でロウ付けされ、この貫通孔2と金属
板3で形成された凹部の底、即ち金属板3上に半導体素
子4を固着し、ワイヤ5で半導体素子の電極(図示せ
ず)とセラミック基板の電極(図示せず)とを接続し、
キャップ6で凹部を封止した後アルミニウムでできたヒ
ートシンク7を金属板3の表面にシリコーンなどの樹脂
8で接着して作られたものがある。
従来、かかるヒートシンク付半導体装置は、第3図(a)
のA部を拡大した第3図(b)に示すようにセラミック基
板1上に厚膜印刷され、焼成して形成されたタングステ
ン・メタライズ層9上に電解めっきして形成した第1ニ
ッケル層10と、あらかじめ表面に下地ニッケル層11
を形成した金属板3とを、銀/銅ロウ材12によりロウ
付けし、その後電解めっきにより第2ニッケル層13及
び金めっき層14を設け、この上に前述した如くヒート
シンク7が樹脂8により接着される構造になっていた。
〔発明が解決しようとする問題点〕
上述した従来のヒートシンク付半導体装置は、ヒートシ
ンクの取付けが金めっき層の上になされていたために、
ヒートシンクの取付強度が弱いという欠点があった。こ
の欠点の認識は、樹脂と金(Au)との密着力は他の金
属に比べて低いので、金めっき面の上にヒートシンクを
樹脂を接着すると、振動や衝撃などの機械的環境試験や
温度サイクルなどの熱的環境試験、あるいはプレッシャ
ー・クッカーテストなどの耐湿性試験を施すと、樹脂と
金めっき面の界面で別れるという事故の発生に知見した
ものである。
〔問題点を解決するための手段〕
本発明は金属板の最外周の表面には金めっき層を施さ
ず、かわりにニッケル層を設けたことを特徴とする。
〔実施例〕
次に、本発明について図面を参照して説明する。第1図
は、第3図(b)に於ける金めっき層14を除去して、第
2ニッケル層13の上に直接ヒートシンク7を樹脂8で
接着したものである。金めっき層の除去には2通りの方
法がある。セラミックのパッケージを作る際に、第2ニ
ッケル層13のめっきが完了した段階で金属板の表面の
みを粘着シールや皮膜材を塗布して金めっきを行なえ
ば、他の必要な部分のみに金めっきがなされ、金属板3
上のみ金めっきがなされない。他の方法は、従来通り、
最終の金めっきまで施した後、金属板3の部分だけ金を
エッチングする方法である。
ニッケルが表面に露出した場合、半導体装置の構造プロ
セスのうち、特に加熱する工程で表面が酸化することが
ある。しかし、本発明ではニッケルの酸化膜は緻密で内
部への腐蝕の進行を防止する機能を果たすだけでなく樹
脂との密着力がかえって向上するということを知見し、
それによって生ずる問題はないと認識した。そしてニッ
ケル層の膜厚も通常と同じ2〜8μm程度でよい。
前述の第2の方法により、金属板3の表面にニッケルを
露出させ、空気中で450℃、1時間の加熱処理をして
その表面を酸化させた後、シリコーン樹脂でアルミニウ
ムのヒートシンクを接着し、その接着強度を測定した結
果を表1に示す。
このようにして、Auめっき面への接着は平均値が低い
だけでなく、バラツキも大きいのに対し、Auめっき面
をを除去し、ニッケルめっき面を露出せしめた面に接着
すると平均強度が高く且つバラツキも小さくなる。
第2は本発明の第2の実施例を示す断面図である。前述
のように、金属板3をセラミック基板1上にロウ付けす
るには、両者の表面にニッケルめっきを施して行なうの
で、第2ニッケル層のめっきを施さなくても、金属板3
の表面には下地ニッケル層11があるので、この面を利
用してもヒートシンク7の接着強度は変わらない。但し
この場合、銀/銅ロウ材12が露出することになるの
で、半導体装置の使用環境が悪ければ腐蝕をおこすこと
がある。従って、この実施例を利用する場合は、使用環
境を選択する必要がある。また、樹脂8の量を増やして
破線14の位置まで樹脂8が拡がるようにし、銀/銅ロ
ウ材の表面を覆うようにしてもよい。
〔発明の効果〕
以上、詳細に説明したように、ヒートシンクを接着する
金属板の表面の金めっきを除去または施さないことによ
りニッケルめっき面を露出させ、そこにヒートシンクを
樹脂で接着することにより、その接着強度を大幅に向上
できるという効果を得ることができる。
【図面の簡単な説明】
第1図は本発明の第一の実施例の要部断面図、第2図は
本発明の第二の実施例の要部断面図、第3図(a)は本発
明にかかわる半導体装置の一例を示す縦断面図、第3図
(b)は従来のヒートシンク接着構造を示す要部断面図で
ある。 1……セラミック基板、2……貫通孔、3……金属板、
4……半導体素子、5……ワイヤ、6……キャップ、7
……ヒートシンク、8……樹脂、9……タングステン・
メタライズ層、10……第1ニッケル層、11……下地
ニッケル層、12……銀/銅ロウ材、13……第2ニッ
ケル層、14……金めっき層。

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】貫通孔を有する絶縁性の基板と、該貫通孔
    を塞ぐように前記基板に密着して設けられた金属板と、
    前記貫通孔と前記金属板によって形成された凹部内の金
    属板上に固着された半導体素子と、前記金属板の前記半
    導体素子の固着面とは反対側の面に樹脂により接着され
    たヒートシンクとを備えた半導体装置に於いて、前記ヒ
    ートシンクが接着されるべき前記金属板の表面がニッケ
    ル層であることを特徴とする半導体装置。
JP62233108A 1987-09-16 1987-09-16 半導体装置 Expired - Lifetime JPH065699B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62233108A JPH065699B2 (ja) 1987-09-16 1987-09-16 半導体装置
US07/244,940 US4876588A (en) 1987-09-16 1988-09-15 Semiconductor device having ceramic package incorporated with a heat-radiator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62233108A JPH065699B2 (ja) 1987-09-16 1987-09-16 半導体装置

Publications (2)

Publication Number Publication Date
JPS6473750A JPS6473750A (en) 1989-03-20
JPH065699B2 true JPH065699B2 (ja) 1994-01-19

Family

ID=16949899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62233108A Expired - Lifetime JPH065699B2 (ja) 1987-09-16 1987-09-16 半導体装置

Country Status (2)

Country Link
US (1) US4876588A (ja)
JP (1) JPH065699B2 (ja)

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JPS5386576A (en) * 1977-01-10 1978-07-31 Nec Corp Package for semiconductor element
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US4319264A (en) * 1979-12-17 1982-03-09 International Business Machines Corporation Nickel-gold-nickel conductors for solid state devices
JPS5852859A (ja) * 1981-09-25 1983-03-29 Hitachi Ltd 絶縁型半導体装置
US4611238A (en) * 1982-05-05 1986-09-09 Burroughs Corporation Integrated circuit package incorporating low-stress omnidirectional heat sink
JPS60236278A (ja) * 1984-05-10 1985-11-25 松下電工株式会社 配線用板
US4829403A (en) * 1987-01-20 1989-05-09 Harding Ade Yemi S K Packaging arrangement for energy dissipating devices

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JPS6473750A (en) 1989-03-20
US4876588A (en) 1989-10-24

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