JPH06196587A - 半導体装置 - Google Patents

半導体装置

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Publication number
JPH06196587A
JPH06196587A JP4343668A JP34366892A JPH06196587A JP H06196587 A JPH06196587 A JP H06196587A JP 4343668 A JP4343668 A JP 4343668A JP 34366892 A JP34366892 A JP 34366892A JP H06196587 A JPH06196587 A JP H06196587A
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor
chip mounting
semiconductor device
heat plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4343668A
Other languages
English (en)
Inventor
Hiroyuki Kozono
浩由樹 小園
Hiromichi Sawatani
博道 沢谷
Shigeki Sako
重樹 酒匂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4343668A priority Critical patent/JPH06196587A/ja
Publication of JPH06196587A publication Critical patent/JPH06196587A/ja
Priority to US08/409,923 priority patent/US5561324A/en
Pending legal-status Critical Current

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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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Abstract

(57)【要約】 【目的】 この発明は、半導体チップと放熱板との間に
半導体搭載板を設けることにより半導体チップと放熱板
とを電気的に分離した構造を有する半導体装置を提供す
ることを目的とする。 【構成】 この発明による半導体装置は、貫通した孔を
有する半導体チップ搭載部と、、上記半導体チップ搭載
部の孔を覆うようにして上記半導体チップ搭載部の一面
に取り付けられた放熱板と、上記放熱板への取り付け面
と反対側の面に金メッキが施され、上記放熱板に取り付
けられ上記孔内に配設され、電気的絶縁性に秀れ、熱伝
導率の高い半導体チップ搭載板と、上記半導体チップ搭
載板に導電性接着剤により接着され、上記孔内に配設さ
れた半導体チップとを備えたことを特徴とする。

Description

【発明の詳細な説明】
[発明の目的]
【0001】
【産業上の利用分野】本発明は、例えばパワ−IC,E
CLゲ−トアレイ,大規模CMOSゲ−トアレイ等を半
導体席細部に搭載する際に半導体搭載板を介して搭載す
る構造を有する半導体装置に関する。
【0002】
【従来の技術】従来の半導体装置は、種々の機能素子、
受動素子を搭載した半導体チップ
【0003】(11)を、第2図に示すように半導体チ
ップ搭載部(12)に形成された貫通孔(14)を覆う
ように半導体チップ搭載部(12)の裏面に取り付けら
れた放熱板(12−1)に直接に導電性接着剤(1
3)、例えば半田、ペースト等で接続している。なお、
半導体チップ(11)を放熱板(12−1)に直接に取
り付けるのは良好な放熱特性を得るためである。
【0004】また、半導体チップ(11)の裏面は放熱
板(12−1)の裏面に接続されることによりワイヤー
(14)を介して半導体搭載部(12)に形成されたG
NDピンに接続されている。
【0005】
【発明が解決しようとする課題】従って、従来の半導体
装置に於いては、放熱板(12−1)と半導体チップ
(11)とGNDピンとは同電位となる。この結果、G
NDピンに任意の電圧を印加すると半導体チップ(1
1)と放熱板(12−1)との間に電圧が加わることと
なる。
【0006】又、半導体チップ(11)は、放熱板(1
2−1)から電気的に独立していないので半導体チップ
(11)の裏面を利用して独自の電圧を印加することが
不可能である。
【0007】更に、半導体チップ(11)に例えば半導
体装置の冷却時に風が当たることにより放熱板(12−
1)にて静電的な電位が生じる。その結果GND電位が
いわゆる揺らぎ現象を起こす。
【0008】この発明は、半導体チップと放熱板との間
に半導体搭載板を設けることにより半導体チップと放熱
板とを電気的に分離した構造を有する半導体装置を提供
することを目的とする。
【0009】
【課題を解決するための手段】この発明による半導体装
置は、貫通した孔を有する半導体チップ搭載部と、上記
半導体チップ搭載部の孔を覆うようにして上記半導体チ
ップ搭載部の一面に取り付けられた放熱板と、
【0010】上記放熱板への取り付け面と反対側の面に
金メッキが施され、上記放熱板に取り付けられ上記孔内
に配設され、電気的絶縁性に秀れ、熱伝導率の高い半導
体チップ搭載板と、上記半導体チップ搭載板に導電性接
着剤により接着され、上記孔内に配設された半導体チッ
プとを備えたことを特徴とする。
【0011】
【作用】この発明による半導体装置によれば、半導体チ
ップと放熱板との間に電気的絶縁性に秀れ、熱伝導率の
高い半導体チップ搭載板を配設したことにより半導体チ
ップと放熱板、換言すれば半導体チップと半導体搭載部
とが電気的に分離される。従って、半導体チップの裏面
の電極と放熱板とは別個の電圧が印加されるようにな
り、本発明による半導体装置の動作の自由度がそれだけ
高くなる。
【0012】又、半導体チップと放熱板とを電気的に分
離したことにより従来の半導体装置におけるごとく半導
体チップにおける電圧の揺らぎ現象の影響がなく安定し
た動作が可能となる。
【0013】
【実施例】この発明による半導体装置の実施例を図面に
基づき説明する。第1図は、本発明による半導体装置の
断面図である。第1図において、(22)は、一面に複
数のピン(26)が設けられた半導体チップ搭載部、
【0014】(22−1)は、Cu−W合金より成り、
半導体チップ搭載部(22)に穿設された貫通孔(22
−2)を覆うようにして半導体チップ搭載部(22)の
他面に取り付けられた放熱板、(23)は、AlN合金
より成り、電気的絶縁性に秀れ(>10(kV/m
m))、熱伝導率の高い(>30(W/MK))半導体
チップ搭載板である。尚、半導体搭載板(23)は、熱
抵抗を0.1(W/℃)以上下げることがないように厚
さ≦0.3(mm)となっている。又、放熱板(22−
1)への取り付け面と反対側の面には金メッキが施され
ている。(21)は、その裏面が半導体チップ搭載板
(23)の金メッキが施された面に導電性接着剤(ぺ−
スト)によって接着された半導体チップである。
【0015】半導体チップ(21)の裏面電極は、半導
体チップ搭載板(23)の金メッキ部からワイヤー(2
5)を介して半導体リ−ドからGNDピンとは別の電源
ピンに接続される。又、放熱板(22−1)は、半導体
装置内で半導体装置のGNDとなるGNDピンに接続さ
れる。
【0016】
【発明の効果】上記のごとく、本発明による半導体装置
は、上記構造を採用することにより放熱板(22−
1)、半導体チップ(21)内部配線、GNDピン(接
地)から成る電気信号系と、半導体チップ(21)の裏
面電極、半導体チップ搭載板(23)の金メッキ部、ワ
イヤー(25),電源ピンから成る電気信号系とを電気
的に完全に分離することが可能となる。
【0017】従って、本発明においては、半導体装置冷
却時の電位の揺らぎは、半導体チップ(21)の裏面電
極の電位に影響を与えず、半導体装置の正常動作を可能
とする。
【図面の簡単な説明】
【図1】この発明による半導体装置の断面図。
【図2】従来の半導体装置の断面図。
【符号の説明】
22…半導体搭載部、22−1…放熱板、23…半導体
搭載板、21…半導体チップ。

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】 貫通した孔を有する半導体チップ搭載部
    と、 上記半導体チップ搭載部の孔を覆うようにして上記半導
    体チップ搭載部の一面に取り付けられた放熱板と、 上記放熱板への取り付け面と反対側の面に金メッキが施
    され、上記放熱板に取り付けられ上記孔内に配設され、
    電気的絶縁性に秀れ、熱伝導率の高い半導体チップ搭載
    板と、 上記半導体チップ搭載板に導電性接着剤により接着さ
    れ、上記孔内に配設された半導体チップとを備えた半導
    体装置。
JP4343668A 1992-12-24 1992-12-24 半導体装置 Pending JPH06196587A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP4343668A JPH06196587A (ja) 1992-12-24 1992-12-24 半導体装置
US08/409,923 US5561324A (en) 1992-12-24 1995-03-23 Semiconductor chip mounting sector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4343668A JPH06196587A (ja) 1992-12-24 1992-12-24 半導体装置

Publications (1)

Publication Number Publication Date
JPH06196587A true JPH06196587A (ja) 1994-07-15

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ID=18363320

Family Applications (1)

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JP4343668A Pending JPH06196587A (ja) 1992-12-24 1992-12-24 半導体装置

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US (1) US5561324A (ja)
JP (1) JPH06196587A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11176986A (ja) * 1997-12-15 1999-07-02 Shinko Electric Ind Co Ltd 高周波用の半導体パッケージと半導体装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2888755B2 (ja) * 1994-04-28 1999-05-10 株式会社メガチップス 半導体装置
US5933324A (en) * 1997-12-16 1999-08-03 Intel Corporation Apparatus for dissipating heat from a conductive layer in a circuit board
TW411595B (en) * 1999-03-20 2000-11-11 Siliconware Precision Industries Co Ltd Heat structure for semiconductor package device

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JPS5386576A (en) * 1977-01-10 1978-07-31 Nec Corp Package for semiconductor element
JPS58169943A (ja) * 1982-03-29 1983-10-06 Fujitsu Ltd 半導体装置
JPH0676790B2 (ja) * 1987-07-30 1994-09-28 株式会社東芝 イグナイタ
JPH065699B2 (ja) * 1987-09-16 1994-01-19 日本電気株式会社 半導体装置
US5184211A (en) * 1988-03-01 1993-02-02 Digital Equipment Corporation Apparatus for packaging and cooling integrated circuit chips
US4914551A (en) * 1988-07-13 1990-04-03 International Business Machines Corporation Electronic package with heat spreader member
JP2813682B2 (ja) * 1989-11-09 1998-10-22 イビデン株式会社 電子部品搭載用基板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11176986A (ja) * 1997-12-15 1999-07-02 Shinko Electric Ind Co Ltd 高周波用の半導体パッケージと半導体装置

Also Published As

Publication number Publication date
US5561324A (en) 1996-10-01

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