JPH06283567A - リードフレームをリードオンチップ式内部リードボンディングする方法及び装置 - Google Patents

リードフレームをリードオンチップ式内部リードボンディングする方法及び装置

Info

Publication number
JPH06283567A
JPH06283567A JP5240023A JP24002393A JPH06283567A JP H06283567 A JPH06283567 A JP H06283567A JP 5240023 A JP5240023 A JP 5240023A JP 24002393 A JP24002393 A JP 24002393A JP H06283567 A JPH06283567 A JP H06283567A
Authority
JP
Japan
Prior art keywords
bonding
lead
lead frame
fingers
leadframe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5240023A
Other languages
English (en)
Japanese (ja)
Inventor
Boon C Teo
シー テオ ブーン
Tjandra Karta
カータ ティアンドラ
Siu W Low
ダブリュー ロウ シュー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH06283567A publication Critical patent/JPH06283567A/ja
Pending legal-status Critical Current

Links

Classifications

    • H10W76/10—
    • H10W70/427—
    • H10W70/415—
    • H10W70/442—
    • H10W70/451—
    • H10W72/00—
    • H10W72/932—
    • H10W74/00—
    • H10W90/756—

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP5240023A 1992-09-30 1993-09-27 リードフレームをリードオンチップ式内部リードボンディングする方法及び装置 Pending JPH06283567A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/954,183 US5331200A (en) 1992-09-30 1992-09-30 Lead-on-chip inner lead bonding lead frame method and apparatus
US07/954183 1992-09-30

Publications (1)

Publication Number Publication Date
JPH06283567A true JPH06283567A (ja) 1994-10-07

Family

ID=25495054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5240023A Pending JPH06283567A (ja) 1992-09-30 1993-09-27 リードフレームをリードオンチップ式内部リードボンディングする方法及び装置

Country Status (7)

Country Link
US (1) US5331200A (enExample)
EP (1) EP0590986B1 (enExample)
JP (1) JPH06283567A (enExample)
KR (1) KR100328906B1 (enExample)
DE (1) DE69329000D1 (enExample)
SG (1) SG44609A1 (enExample)
TW (1) TW239901B (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2732767B2 (ja) * 1992-12-22 1998-03-30 株式会社東芝 樹脂封止型半導体装置
US5729049A (en) * 1996-03-19 1998-03-17 Micron Technology, Inc. Tape under frame for conventional-type IC package assembly
US6078502A (en) * 1996-04-01 2000-06-20 Lsi Logic Corporation System having heat dissipating leadframes
US5717246A (en) 1996-07-29 1998-02-10 Micron Technology, Inc. Hybrid frame with lead-lock tape
US5763945A (en) * 1996-09-13 1998-06-09 Micron Technology, Inc. Integrated circuit package electrical enhancement with improved lead frame design
US5907184A (en) 1998-03-25 1999-05-25 Micron Technology, Inc. Integrated circuit package electrical enhancement
US5817540A (en) * 1996-09-20 1998-10-06 Micron Technology, Inc. Method of fabricating flip-chip on leads devices and resulting assemblies
US6068174A (en) 1996-12-13 2000-05-30 Micro)N Technology, Inc. Device and method for clamping and wire-bonding the leads of a lead frame one set at a time
US6462404B1 (en) 1997-02-28 2002-10-08 Micron Technology, Inc. Multilevel leadframe for a packaged integrated circuit
US6271582B1 (en) * 1997-04-07 2001-08-07 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
US6008996A (en) * 1997-04-07 1999-12-28 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
US6580157B2 (en) * 1997-06-10 2003-06-17 Micron Technology, Inc. Assembly and method for modified bus bar with Kapton™ tape or insulative material in LOC packaged part
US5780923A (en) 1997-06-10 1998-07-14 Micron Technology, Inc. Modified bus bar with Kapton™ tape or insulative material on LOC packaged part
SG73480A1 (en) * 1997-11-06 2000-06-20 Texas Instr Singapore Pte Ltd High density integrated circuit package
US6144089A (en) 1997-11-26 2000-11-07 Micron Technology, Inc. Inner-digitized bond fingers on bus bars of semiconductor device package
JPH11251006A (ja) * 1997-12-19 1999-09-17 Osram Sylvania Inc リードフレーム、リードフレームアセンブリ及び関連方法
SG79963A1 (en) * 1998-03-28 2001-04-17 Texas Instr Singapore Pte Ltd Semiconductor device testing and burn-in methodology
US6124150A (en) 1998-08-20 2000-09-26 Micron Technology, Inc. Transverse hybrid LOC package
US6052289A (en) * 1998-08-26 2000-04-18 Micron Technology, Inc. Interdigitated leads-over-chip lead frame for supporting an integrated circuit die
KR100408391B1 (ko) 2000-06-09 2003-12-06 삼성전자주식회사 전원 배선을 개선한 볼그리드 어레이 패키지 반도체 장치
US7154186B2 (en) * 2004-03-18 2006-12-26 Fairchild Semiconductor Corporation Multi-flip chip on lead frame on over molded IC package and method of assembly
TWI447878B (zh) * 2009-08-28 2014-08-01 杰群科技有限公司 增加通路及降低電阻之電晶體連接結構
US9263370B2 (en) * 2013-09-27 2016-02-16 Qualcomm Mems Technologies, Inc. Semiconductor device with via bar
US9570381B2 (en) * 2015-04-02 2017-02-14 Advanced Semiconductor Engineering, Inc. Semiconductor packages and related manufacturing methods

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114261A (en) * 1981-01-07 1982-07-16 Hitachi Ltd Lead frame structure
US4754317A (en) * 1986-04-28 1988-06-28 Monolithic Memories, Inc. Integrated circuit die-to-lead frame interconnection assembly and method
US4801999A (en) * 1987-07-15 1989-01-31 Advanced Micro Devices, Inc. Integrated circuit lead frame assembly containing voltage bussing and distribution to an integrated circuit die using tape automated bonding with two metal layers
KR0158868B1 (ko) * 1988-09-20 1998-12-01 미다 가쓰시게 반도체장치
US5227661A (en) * 1990-09-24 1993-07-13 Texas Instruments Incorporated Integrated circuit device having an aminopropyltriethoxysilane coating
US5206536A (en) * 1991-01-23 1993-04-27 Texas Instruments, Incorporated Comb insert for semiconductor packaged devices
KR940006164B1 (ko) * 1991-05-11 1994-07-08 금성일렉트론 주식회사 반도체 패키지 및 그 제조방법
JPH05114685A (ja) * 1991-10-23 1993-05-07 Mitsubishi Electric Corp 半導体装置
KR940008066A (ko) * 1992-09-18 1994-04-28 윌리엄 이. 힐러 집적 회로용 다중층 리드 프레임 어셈블리 및 방법

Also Published As

Publication number Publication date
KR940008057A (ko) 1994-04-28
TW239901B (enExample) 1995-02-01
SG44609A1 (en) 1997-12-19
EP0590986A1 (en) 1994-04-06
DE69329000D1 (de) 2000-08-17
KR100328906B1 (ko) 2002-07-08
EP0590986B1 (en) 2000-07-12
US5331200A (en) 1994-07-19

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