JPH0618234B2 - 半導体基板の接合方法 - Google Patents

半導体基板の接合方法

Info

Publication number
JPH0618234B2
JPH0618234B2 JP60082609A JP8260985A JPH0618234B2 JP H0618234 B2 JPH0618234 B2 JP H0618234B2 JP 60082609 A JP60082609 A JP 60082609A JP 8260985 A JP8260985 A JP 8260985A JP H0618234 B2 JPH0618234 B2 JP H0618234B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
semiconductor substrate
glassy
ultrafine particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60082609A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61242033A (ja
Inventor
廉士 澤田
純二 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP60082609A priority Critical patent/JPH0618234B2/ja
Priority to KR1019860002933A priority patent/KR900005890B1/ko
Priority to CA000506868A priority patent/CA1244968A/en
Priority to DE19863613215 priority patent/DE3613215A1/de
Priority to NLAANVRAGE8600983,A priority patent/NL189634C/xx
Publication of JPS61242033A publication Critical patent/JPS61242033A/ja
Priority to US07/266,304 priority patent/US4978379A/en
Publication of JPH0618234B2 publication Critical patent/JPH0618234B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/061Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/17Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

Landscapes

  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)
JP60082609A 1985-04-19 1985-04-19 半導体基板の接合方法 Expired - Lifetime JPH0618234B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP60082609A JPH0618234B2 (ja) 1985-04-19 1985-04-19 半導体基板の接合方法
KR1019860002933A KR900005890B1 (ko) 1985-04-19 1986-04-16 반도체 기판의 접합방법
CA000506868A CA1244968A (en) 1985-04-19 1986-04-16 Method of joining semiconductor substrates
DE19863613215 DE3613215A1 (de) 1985-04-19 1986-04-18 Verfahren zur herstellung eines halbleitersubstrats
NLAANVRAGE8600983,A NL189634C (nl) 1985-04-19 1986-04-18 Werkwijze voor het vervaardigen van een halfgeleidersubstraat.
US07/266,304 US4978379A (en) 1985-04-19 1988-10-31 Method of joining semiconductor substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60082609A JPH0618234B2 (ja) 1985-04-19 1985-04-19 半導体基板の接合方法

Publications (2)

Publication Number Publication Date
JPS61242033A JPS61242033A (ja) 1986-10-28
JPH0618234B2 true JPH0618234B2 (ja) 1994-03-09

Family

ID=13779215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60082609A Expired - Lifetime JPH0618234B2 (ja) 1985-04-19 1985-04-19 半導体基板の接合方法

Country Status (6)

Country Link
US (1) US4978379A (enExample)
JP (1) JPH0618234B2 (enExample)
KR (1) KR900005890B1 (enExample)
CA (1) CA1244968A (enExample)
DE (1) DE3613215A1 (enExample)
NL (1) NL189634C (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010534948A (ja) * 2007-07-31 2010-11-11 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウェハ接合方法、ウェハ複合体並びにチップ

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2685819B2 (ja) * 1988-03-31 1997-12-03 株式会社東芝 誘電体分離半導体基板とその製造方法
JPH07142571A (ja) * 1993-11-12 1995-06-02 Ube Ind Ltd 複合半導体基板及びその製造方法
US5639325A (en) * 1995-02-01 1997-06-17 The Whitaker Corporation Process for producing a glass-coated article
JPH08264636A (ja) * 1995-03-23 1996-10-11 Ube Ind Ltd 複合半導体基板
JPH08264637A (ja) * 1995-03-23 1996-10-11 Ube Ind Ltd 複合半導体基板
JPH08264643A (ja) * 1995-03-23 1996-10-11 Ube Ind Ltd 複合半導体基板
WO1997010184A1 (en) * 1995-09-12 1997-03-20 Corning Incorporated Boule oscillation patterns for producing fused silica glass
JP3979666B2 (ja) * 1995-09-12 2007-09-19 コーニング インコーポレイテッド 溶融シリカガラスの製造に於ける、炉、その使用方法及び炉によって製造された光学製品
EP0850201B1 (en) * 1995-09-12 2003-07-16 Corning Incorporated Containment vessel for producing fused silica glass
JPH10275752A (ja) 1997-03-28 1998-10-13 Ube Ind Ltd 張合わせウエハ−及びその製造方法、基板
RU2197768C2 (ru) * 1999-10-29 2003-01-27 Громов Владимир Иванович Способ изготовления полупроводниковой структуры
KR100499134B1 (ko) * 2002-10-28 2005-07-04 삼성전자주식회사 압축 접합 방법
JP6742593B2 (ja) * 2015-01-05 2020-08-19 日本電気硝子株式会社 支持ガラス基板の製造方法及び積層体の製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2272342A (en) * 1934-08-27 1942-02-10 Corning Glass Works Method of making a transparent article of silica
US2239551A (en) * 1939-04-22 1941-04-22 Corning Glass Works Method of making sealing glasses and seals for quartz lamps
US3768991A (en) * 1972-06-14 1973-10-30 Diacon Method for sealing an enclosure for an electronic component
US3909332A (en) * 1973-06-04 1975-09-30 Gen Electric Bonding process for dielectric isolation of single crystal semiconductor structures
DE2738614A1 (de) * 1976-09-01 1978-03-02 Hitachi Ltd Verfahren zum herstellen von halbleitersubstraten fuer integrierte halbleiterschaltkreise
JPS5330477A (en) * 1976-09-02 1978-03-22 Agency Of Ind Science & Technol Preparation of liquid drop
JPS5357978A (en) * 1976-11-05 1978-05-25 Hitachi Ltd Production of dielectric insulated and isolated substrate
US4294602A (en) * 1979-08-09 1981-10-13 The Boeing Company Electro-optically assisted bonding
GB2060252B (en) * 1979-09-17 1984-02-22 Nippon Telegraph & Telephone Mutually isolated complementary semiconductor elements
US4363647A (en) * 1981-05-14 1982-12-14 Corning Glass Works Method of making fused silica-containing material
JPS5844723A (ja) * 1981-09-11 1983-03-15 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
US4501060A (en) * 1983-01-24 1985-02-26 At&T Bell Laboratories Dielectrically isolated semiconductor devices
DD214836A1 (de) * 1983-04-26 1984-10-24 Werk Fernsehelektronik Veb Verfahren zum verbinden und hermetisieren von substraten mittels glaslot

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010534948A (ja) * 2007-07-31 2010-11-11 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウェハ接合方法、ウェハ複合体並びにチップ

Also Published As

Publication number Publication date
NL189634B (nl) 1993-01-04
KR860008607A (ko) 1986-11-17
CA1244968A (en) 1988-11-15
NL8600983A (nl) 1986-11-17
US4978379A (en) 1990-12-18
DE3613215A1 (de) 1986-10-23
KR900005890B1 (ko) 1990-08-13
JPS61242033A (ja) 1986-10-28
DE3613215C2 (enExample) 1989-07-20
NL189634C (nl) 1993-06-01

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Legal Events

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